category: Whitepapers

category: IoT, Security & Automotive

Imaging Of Overlay And Alignment Markers Under Opaque Layers Using Picosecond Laser Acoustic Measurements
By Onto Innovation - 09 Nov, 2021 - Comments: 0

Optically opaque materials present a series of challenges for alignment and overlay in the semi-damascene process flow or after the processing of the magnetic tunnel junction (MTJ) of a Magnetic Random-Access Memory (MRAM). The overlay and alignment of a lithographically defined pattern on top of the pattern and the underlying layer is fundamental to device operation in all multi-layer patterne... » read more

How To Reduce The Impact Of The Global Microcontroller Shortage On ECU Software Development
By Siemens EDA - 03 Nov, 2021 - Comments: 0

The COVID-19 pandemic had a massive impact on all facets of business and commerce, as widespread supply chain disruptions rippled through every industry. Multiple factors collided to create a global microcontroller shortage that is now impacting the automotive industry, and is forcing developers to redesign Electronic Control Units (ECUs) using alternative Microcontrollers (MCUs) and to otherwi... » read more

Root Of Trust RT-600 Series Security Anchored in Hardware
By Rambus - 03 Nov, 2021 - Comments: 0

Built around a custom 32-bit CPU, the Rambus Root of Trust RT-600 series is at the forefront of a new category of programmable hardware-based security cores. Siloed from the primary processor, it is specifically designed to securely run sensitive code, processes, and algorithms. In addition to the CPU, the RT-600 series contains a large set of hardware blocks arranged around an internal bus fab... » read more

RF/Microwave Technology Driving The Connected Car
By Cadence - 03 Nov, 2021 - Comments: 0

In-car networks and advanced driver-assistance systems (ADAS), made possible through wireless sensors, driver-assist radar, vehicle communications, and related electronics, present many design challenges to engineers. Simulation software enables design teams to effectively manage the complex design and integration challenges associated with developing these high-speed and RF-enabled networks. T... » read more

ML-based Routing Congestion And Delay Estimation In Vivado ML Edition
By Xilinx - 03 Nov, 2021 - Comments: 0

The FPGA physical design flow offers a compelling opportunity for Machine Learning for CAD (MLCAD) for the following reasons: • An ML solution can be applied wholesale to a device family. • There is a vast data farm that can be harvested from device models and design data from broad applications. • There is a single streamlined design flow that an be instrumented, annotated, and quer... » read more

How Semiconductor Solutions Address Safety Requirements Of Future Power Distribution Networks In Autonomous Vehicles
By Infineon - 03 Nov, 2021 - Comments: 0

Open up the bonnet of any modern automobile and many of us would be hard-pressed to find anything that we could fix ourselves. With pipes and cables almost artistically integrated into the engine bay, and sleek plastic covers fitted everywhere, there is very little that can still be recognized, yet alone repaired. Perhaps the only location where we feel comfortable is the “fuse box”, or pow... » read more

Microchip Sees Significant Productivity Gains In Mature-Node Custom IC Design With In-Design Signoff DRC
By Siemens EDA - 27 Oct, 2021 - Comments: 0

Microsemi pioneered the design of innovative chips that are used for multiple purposes across a variety of industries, using both mature and advanced process nodes. In mature node custom design implementation, layout designers still spend a significant amount of their valuable time fixing DRC errors—time that could be more beneficially spent ensuring their designs meet their PPA goals. By rep... » read more

Co-Packaged Optics And The Evolution Of Switch/Optical Interconnects In Data Centers
By Synopsys - 27 Oct, 2021 - Comments: 0

Driven by a need to reduce power and increase bandwidth density in data center network switches and other devices, the data networking industry is moving toward adoption of co-packaged optics (CPO). This paper provides a brief overview of the history of copper and optical interconnects, the limitations of existing interconnect solutions, and the future of co-packaged optics, including the benef... » read more

Hierarchical Verification for EC-FPGA Flow
By OneSpin Solutions - 27 Oct, 2021 - Comments: 0

This document describes the methodology to apply EC-FPGA verification using hierarchical netlists. This approach is recommended in case the verification of the overall design has issues with convergence. The document contains a step-by-step description of different methods while providing reasoning for the soundness of each approach. It is assumed for this document that the reader is familiar w... » read more

3D-IC Design Challenges And Requirements
By Cadence - 27 Oct, 2021 - Comments: 0

As demands accelerate for increasing density, higher bandwidths, and lower power, many IC design and packaging teams are taking a close look at vertical stacking multiple chips and chiplets. This technology, called 3D-IC, promises many advantages over traditional single-die planar designs. Some are using the term “More-than-Moore” to describe the potential of this new technology. Integratio... » read more

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