13000 FPS Vision System-on-Chip With Mixed-Signal Compressed Sensing


This paper presents a monolithic high-speed VSoC (Vision-System-on-Chip) with three software-programmable 16-bit ASIPs (application-specific instruction-set processors), a 1024-fold column-parallel data path of charge-based convolution functionality, freely configurable A/D conversion, 8-bit processor elements with 128 bytes of RAM each, and asynchronously compressing output of sparse column da... » read more

Materials For The Electrification Of The Powertrain


The challenge for those looking to electrify powertrains in automotive and aerospace applications is essential to solve at both strategic and technical levels. Engineers are on the front line of an electrification revolution that must take place, and materials are evolving quickly to enable this revolution. Finding materials with the right thermal, structural, and electromagnetic properties for... » read more

Smart DFT Infrastructure And Automation Are Key To Managing Design Scaling


This paper describes how using a smarter DFT infrastructure and automation can greatly improve the DFT schedule. A structural DFT infrastructure based on plug-and-play principles is used to enable concurrent DFT development and integration. DFT automation is used to connect and manage the DFT infrastructure to dramatically reduce the risks associated with design scaling and complexity. Highe... » read more

Evolution Of Data Center Networking Technology — IP And Beyond


Ethernet is ubiquitous—it is the core technology that defines the Internet and serves to connect the world in ways that people could not imagine even one generation ago. HPC clusters are working on solving the most challenging problems facing humanity—and cloud computing is the service hosting many of the application workloads struggling with these questions. While alternative network infra... » read more

Technology Advancements For Dynamic Function eXchange In Vivado ML Edition


As systems become more complex and designers are asked to do more with less, adaptability is a critical asset. While Xilinx FPGAs and SoCs always provided the flexibility to perform on-site device reprogramming, current constraints including increased cost, tighter board space, and power consumption demand even more efficient design strategies. Xilinx Dynamic Function eXchange (DFX) extends the... » read more

Addressing Library Characterization And Verification Challenges Using ML


At advanced process nodes, Liberty or library (.lib) requirements are more demanding due to design complexities, increased number of corners required for timing signoff, and the need for statistical variation modeling. This results in an increase in size, complexity, and the number of .lib characterizations. Validation and verification of these complex and large .lib files is a challenging task... » read more

Data Center Evolution: The Leap To 64 GT/s Signaling With PCI Express 6.0


The PCI Express (PCIe) interface is the critical backbone that moves data at high bandwidth and low latency between various compute nodes such as CPUs, GPUs, FPGAs, and workload-specific accelerators. With the torrid rise in bandwidth demands of advanced workloads such as AI/ML training, PCIe 6.0 jumps signaling to 64 GT/s with some of the biggest changes yet in the standard. Download this w... » read more

Augment Or Replace? How IAST Fits Into The AppSec Landscape


As the pace, volume, and complexity of application development continue to escalate, it becomes increasingly difficult to maintain software security and quality. More speed, more volume, and more complexity too often lead to less security and less quality. Interactive application security testing (IAST) is an exciting option for organizations looking to maintain both the speed and complexity... » read more

Innovative Top-Side Cooled Package Solution For High-Voltage Applications


This application note shows the benefits of using top-side cooled (TSC) power devices in high-voltage (HV) applications. In addition, it should help designers of such applications to understand how the device can be used and how an efficient and easy-to-assemble approach can be chosen to integrate TSC devices into the system. This application note describes Infineon’s new heat-spreader dual s... » read more

Veloce Coverage App And Veloce Assertion App Deliver Unified Coverage Methodology


The interoperability of the Veloce Coverage app and the Veloce Assertion app with other verification engines (simulation and formal) enables merging coverage collected by each engine and provides a cohesive coverage closure report and analysis flow. It enables the verification team and product-level management to make important decisions such as coverage closure sign-off, test quality analysis ... » read more

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