Increasing IP And SoC Debug Efficiency 10X With Intelligent Waveform Reuse


Design and verification reuse lies at the very heart of every modern chip development effort. A system on chip (SoC) project with billions of gates cannot possibly be completed in reasonable time without leveraging blocks from prior projects and commercial intellectual property (IP) offerings. These reused blocks are themselves challenging to develop since they are as large and complex as previ... » read more

Supply Chain Security And Counterfeit Detection Using UCT


The recent shortage of chip supply and long lead times prompted system makers to turn to second tier suppliers and distributors for fulfilling their semiconductor needs. This in turn has put the spotlight on the growing concern of fraudulent or counterfeited integrated circuits (ICs). Proteus deep data analytics based on Universal Chip Telemetry (UCT) provides a new approach to supply chain ... » read more

Over-The-Air (OTA) Test Socket And Handler Integration Technology For 5G Mass Production Testing


This paper presents the integration of socket, measurement antenna and handler for over-the-air (OTA) testing of antenna-in-package (AiP) devices using automated test equipment (ATE) for 5G applications. The design and characteristics of sockets for performing OTA testing in the radiating near field are also discussed. The paper also describes the structure of OTA handler integration using thes... » read more

Large-Field, Fine-Resolution Lithography Enables Next-Generation Panel-Level Packaging


The lithography challenge for large heterogeneous integration is the limited size of the exposure field (typically 60mm x 60mm or less) for most currently available lithography systems. Fine resolution and a large field size provide the user with the opportunity to increase the package size beyond 150mm x 150mm and maintain high throughput. This new capability has the potential to pave the ... » read more

High-Quality Test And Embedded Analytics For Secure Applications


Designs for secure applications such as smart cards and those used in the defense industry require security to ensure sensitive data is inaccessible to outside agents. This used to be a somewhat niche requirement and the implementation of custom solutions to meet these specific requirements was common. However, with the explosion within the semiconductor industry of automotive and cyber-phys... » read more

Radar Systems


Combined with advances in phased-array antennas and integration technologies, radars are moving beyond military/aerospace markets to address a host of commercial applications. This white paper showcases how the Cadence AWR Design Environment platform provides designers with a host of modeling and simulation technologies needed to meet the challenges of all types of radar system design. Click h... » read more

Reinventing Traceability


This paper written by Vincent Thibault of Arteris IP describes semiconductor industry-specific problems with establishing and automating traceability between the disparate systems design teams use for requirements, specification, EDA, software engineering, verification, documentation and support. It proposes and explains the Arteris Harmony Trace solution which: Increases system quality... » read more

Safe And Reliable MOSFET Operation In Bidirectional Power Switch (BDPS) Applications


The global market for battery-powered applications is rapidly growing, including power tools, service robots, light electric vehicles, and many others. The evolution of switched-mode power supply (SMPS) topologies enables designers to ensure safe charging and discharging of the equipment’s battery using bidirectional converters through the same terminal. However, to meet the safety requiremen... » read more

Hardware Root of Trust: Everything You Need To Know


As explained in our “Secure Silicon IP Webinar Series“, a root of trust is the security foundation for an SoC, other semiconductor device or electronic system. However, its meaning differs depending on who you ask. For example, the hardware root of trust contains the keys for cryptographic functions and is usually a part of the secure boot process providing the foundation for the software c... » read more

Taking 2.5D/3DIC Physical Verification To The Next Level


As package designs evolve, so do verification requirements and challenges. Designers working on multi-die, multi-chiplet stacked configurations in 2.5/3D IC designs can use Calibre 3DSTACK physical verification checks to verify die alignments for proper connectivity and electrical behavior. The Calibre 3DSTACK precheck mode enables design teams to find and correct basic implementation mistakes ... » read more

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