Chip Industry Technical Paper Roundup: July 22

SiC packaging; functional test sequences; 6G and beyond; verification for NVM; thwarting ML/algorithmic structural attacks; 3D PICs; excitonic phenomena In TMDs; neural networks.

popularity

New technical papers recently added to Semiconductor Engineering’s library.

Technical Paper Research Organizations
Liquid Metal Fluidic Connection and Floating Die Structure for Ultralow Thermomechanical Stress of SiC Power Electronics Packaging Cambridge University
Low loss fiber-coupled volumetric interconnects fabricated via direct laser writing University of Illinois Urbana-Champaign (UIUC)
Functional Compaction for Functional Test Sequences Purdue University
Flip-Lock: A Flip-Flop-Based Logic Locking Technique for Thwarting ML-based and Algorithmic Structural Attacks TU Dresden and Ruhr University Bochum
Dynamical Control of Excitons in Atomically Thin Semiconductors Harvard University, Google Research, Stanford University, UC Riverside and others
6G: The Intelligent Network of Everything —A Comprehensive Vision, Survey, and Tutorial Finland’s University of Oulu
iMIV: in-Memory Integrity Verification for NVM Intel Labs and Indian Institute of Science (IISc)
Hardware implementation of backpropagation using progressive gradient descent for in situ training of multilayer neural networks Eindhoven University of Technology

More Reading
Technical Paper Library home



Leave a Reply


(Note: This name will be displayed publicly)