Low-power electronics roadmap; preventing Rowhammer via memory allocation; 2D FETs strain engineering; neuromorphic HW virtualization; non-volatile resistive switching; ambipolar Schottky-based ferroelectric design; tunnel FETs.
New technical papers recently added to Semiconductor Engineering’s library:
| Technical Paper | Research Organizations |
|---|---|
| Roadmap on low-power electronics | Rice University, UC Berkeley, Georgia Tech, TSMC, Intel, Harvard, et al. |
| Preventing Rowhammer Exploits via Low-Cost Domain-Aware Memory Allocation | Georgia Tech |
| Strain engineering in 2D FETs: Physics, status, and prospects | UC Santa Barbara |
| Multiscale Simulation and Machine Learning Facilitated Design of Two-Dimensional Nanomaterials-Based Tunnel Field-Effect Transistors: A Review | University of Chicago and Argonne National Lab |
| NeuroVM: Dynamic Neuromorphic Hardware Virtualization | Stanford University, UT Austin and Temsa Research & Development Center |
| Non-Volatile Resistive Switching in Nanoscaled Elemental Tellurium by Vapor Transport Deposition on Gold | Politecnico di Milano, UT Austin, and STMicroelectronics |
| On the Potential of Ambipolar Schottky-Based Ferroelectric Transistor Designs for Enhanced Memory Windows in Scaled Devices | Global TCAD Solutions, Igor Sikorsky Kyiv Polytechnic Institute, INSA Lyon, and NaMLab |
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