On-Current Performance of Ultra-Scaled NSFETs With Source/Drain Underlap Doping (Global TCAD Solutions, TU Wien)


A new technical paper titled "On-Current Degradation in Ultra-Scaled Nanosheet FETs with S/D Underlap Doping" was published by researchers at Global TCAD Solutions GmbH and TU Wien. Abstract: "Aggressive gate pitch scaling makes it increasingly challenging to control the doping gradient at the source/drain (S/D) extensions. To address this, S/D underlap doping has been proposed as a solutio... » read more

Chip Industry Technical Paper Roundup: Dec. 3


New technical papers recently added to Semiconductor Engineering’s library: [table id=391 /] » read more

Gate-All-Around: TCAD and DTCO Approach To Evaluate Power and Performance (imec, et al.)


A new technical paper titled "Exploring GAA-Nanosheet, Forksheet and GAA-Forksheet Architectures: a TCAD-DTCO Study at 90 nm & 120 nm Cell Height" was published by imec, Huawei Technologies and Global TCAD Solutions. Abstract "This study presents a Technology Computer Aided Design (TCAD) and comprehensive Design-Technology Co-Optimization (DTCO) approach to evaluate and enhance power an... » read more

Chip Industry Technical Paper Roundup: Nov. 25


New technical papers recently added to Semiconductor Engineering’s library: [table id=386 /] » read more

Chip Industry Technical Paper Roundup: Oct. 8


New technical papers recently added to Semiconductor Engineering’s library: [table id=365 /] More ReadingTechnical Paper Library home » read more

Ambipolar Schottky-based FeFET For Ultrascaled Memory Applications


A new technical paper titled "On the Potential of Ambipolar Schottky-Based Ferroelectric Transistor Designs for Enhanced Memory Windows in Scaled Devices" was published by researchers at Global TCAD Solutions, Igor Sikorsky Kyiv Polytechnic Institute, INSA Lyon, and NaMLab. "Here, we promote an ambipolar Schottky-based ferroelectric transistor (AS-FeFET) as an alternative design. We demonstr... » read more