Inside Inspection And Metrology

Semiconductor Engineering sat down to talk about inspection, metrology and other issues with Mehdi Vaez-Iravani, vice president of advanced imaging technologies at Applied Materials. What follows are excerpts of that conversation.

SE: Today, the industry is working on a new range of complex architectures, such as 3D NAND and finFETs. For these technologies, the industry is clearly struggling with yields. Is the industry is beginning to change its viewpoint about inspection and metrology?

Vaez-Iravani: There is no doubt. In the past, I’ve heard people say that inspection and metrology is not going to be as important as we go forward. Actually, it’s very much the opposite. It’s getting much harder. It’s going to get impossible to do some of these things without metrology, because we are talking about sub-angstrom level accuracies. We have very tight windows. So, the need for inspection and metrology is going up. It’s become a necessity.

SE: What are chipmakers asking for to meet those challenges?

Vaez-Iravani: In the business of inspection and metrology for semiconductor manufacturing, volume is everything. Speed is everything. Sensitivity is paramount. Otherwise, it won’t help the fab manager with their yields. So I am one who believes that everything we do has to have an element of applicability in the fab environment. Otherwise, you might as well do research for the sake of research. There is a place for that in universities, however.

SE: Let’s start with wafer inspection. What are the big challenges in wafer inspection today?

Vaez-Iravani: There are many, many challenges. In the old days, there was primarily a concern for Moore’s Law. You had the same sort of materials. Then, you had to deal with different nodes. But nowadays, you have all sorts of other things. You have, of course, Moore’s Law. You have materials that are changing. You have the ramifications of the different types of lithography. Customers really expect more information. They want to know something about the nature of the defects. They want to know, for example, what the causation is. They want to know the precise information about this chamber or that chamber, or this process or that process. It is getting harder and harder.

SE: Optical inspection is the mainstream technology. Can we continue to use optical inspection for the foreseeable future?

Vaez-Iravani: Absolutely. There are many things going for optical. And as a result, it will definitely continue way into the future. Optical, in my opinion, is here to stay.

SE: Some say optical inspection may run out of steam one day. Any thoughts?

Vaez-Iravani: People used to say this about optical lithography. Look where optical has gone. There is always ingenuity in the marketplace. But we do have some challenges here.

SE: Hermes Microvision has carved out a decent niche in e-beam wafer inspection. Any thoughts about e-beam inspection in general?

Vaez-Iravani: Applied is very strong in e-beam technology. You can imagine that we look at each and all possible avenues. And to the extent that e-beam happens to be a very strong technical aspect of Applied, we are obviously looking at those things. Hermes has done well. But we are very bullish about our own technology.

SE: Will e-beam inspection ever replace optical?

Vaez-Iravani: For the foreseeable future, in my opinion, they will both carry on in concert. There are many, many good things going on in optical. There is a huge amount of know-how, and a huge number of components, going into optical. E-beam also has its domain. And absolutely, they will both co-exist for a long time.

SE: Is there a point where e-beam inspection does more than optical in the in-line flow and vice versa?

Vaez-Iravani: There is always overlap. For example, you have a domain of a silo of electrons and a silo of optics. Of course, there are regions of sensitivities and specificities, where, for example, one type of technology has more applications than the other.

SE: Will e-beam inspection ever be used in production or is it just an R&D tool?

Vaez-Iravani: It can be used in production. Using it in a mix-and-match environment is a good way to describe it. One is always interested in increasing the applicably of e-beam in various forms.

SE: Doesn’t multi-beam e-beam inspection have many of the same challenges as multi-beam for lithography applications?

Vaez-Iravani: With regards to direct-write using e-beams, you can imagine that you want to implement a massively parallel technology. But by definition, it’s going to be a very hard thing to do. Again, it’s not so much whether it can be done or not. It can be done from a technical point. But the question is can you do it economically or not. It’s a question of throughput. It’s the marriage between the throughputs and the basic technology. This is what makes this so complex. Plus, optical lithography has established such a high bar. If any other technology is going to replace it, it has to satisfy all of those things.

SE: Any other thoughts?

Vaez-Iravani: This very same concept also applies to inspection and metrology in the following sense. The object of the exercise isn’t really whether one can detect something or whether one can measure something. The object of the exercise is whether we can do this fast and in-line. And that’s when things get complicated. Take EUV, for example. When is EUV going to be ready? As a technology, it is ready. The question is when is it going to make economic sense. Similar considerations are applied to process control.

SE: Sematech and Zeiss have been co-developing a massively parallel e-beam inspection tool. They hope to have a demo tool by 2019. Any thoughts?

Vaez-Iravani: The question is when will it match the throughputs of optical. Or is this when they will have a basic demonstration of the technology? Actually, it’s a hard thing on both fronts. In my opinion, this remains a very challenging project.

SE: Chipmakers are ramping up 16nm/14nm finFETs, with 10nm finFETs just around the corner. What are the process control challenges if or when we get to 7nm and/or 5nm?

Vaez-Iravani: Everything is a challenge. You have physics and sensitivity requirements. You have the materials to deal with. You have the architectures that are changing. You have the need to essentially respond to any sort of materials that the designers deem necessary to put in the devices.

SE: If we go to 7nm and/or 5nm, how do we find the defects? Will we need to use optical or e-beam inspection?

Vaez-Iravani: In theory, you have to do all of the above. And also, you have to remember there are different layers. Some of the later layers don’t necessarily have to be inspected with the same technology that you use with the earlier layers. It’s very similar with the tricks you use with lithography.

SE: Any other challenges?

Vaez-Iravani: We at Applied and others in the industry have to be prepared for whatever the chipmakers deem necessary. We have to make sure our equipment is capable of making those things. In my business, I have to be ready for the metrology and inspection of those things. The world has to continue with new nodes and we have to be ready.

SE: Let’s move to metrology. This is also becoming more challenging, right?

Vaez-Iravani: I’m afraid it’s not getting any easier. First of all, there are many aspects of metrology. It’s not just the CDs. You have to ask what kind of CDs. Is it the CDs at the top or bottom? For example, look at the staircase structure in V-NAND. We need angstrom-level accuracy in order to do the job on that. So the metrology of that is significant. Then you have very deep trenches and structures. How do you interact with such a thing at the bottom? If you were to collapse a three-dimensional structure into a one-dimensional entity, it may, in some respects, appear to be easier. But, of course, that’s not the case.

SE: How about new materials?

Vaez-Iravani: III-Vs are very important. SiGe is taking off. There’s high-k and low-k. People are still coming up with new materials. We need to be prepared for anything that is thrown at us.

SE: There is no one single metrology tool technology that can do everything with today’s 3D NAND and finFETs. So, the industry is throwing everything at the problem, such as AFM, CD-SEM, OCD and even X-ray. Any thoughts?

Vaez-Iravani: What you are hearing is this desired search to look for the best solution. It’s an optimization process. So, that’s why people talk about X-ray, OCD, infrared and things like that. But again, when you throw in the requirements for matching, in-line or speed, that’s when things get complicated. Many of those techniques that are applicable in the laboratory are not necessarily translatable into something for production. This is something that has to be considered.

SE: So there are many tradeoffs?

Vaez-Iravani: From a pure microscopy point of view, there are many different ways of doing it. The question is how do you get the contrast, signals of interest and the accuracy on one hand? And at the same time, how do you satisfy the fab managers in terms of the speed and the in-line aspect of it?

SE: What’s the solution?

Vaez-Iravani: At the beginning of the design of a structure, we need to worry about metrology. But in reality, the onus is really on us from a metrology point of view to come up with methods to help our friends. That’s okay, as long as there’s nothing against the law of physics. The fact that it’s challenging makes it interesting for us.

SE: As we look into the future, any last thoughts?

Vaez-Iravani: From now to 2020, it will be very interesting. We have to see what EUV does. We have to see whether Moore’s Law will continue to slow down or not.