tag: verification

Experts At The Table: Low-Power Verification
By Ed Sperling - 09 Feb, 2012 - Comments: 0

Low-Power Engineering sat down to discuss the problems of identifying and verifying power issues with Barry Pangrle, solutions architect for low-power design at Mentor Graphics; Krishna Balachandran, director of low-power verification marketing at Synopsys; Kalar Rajendiran, senior director of marketing at eSilicon; Will Ruby, senior director of technical sales and support at Apache Design; and... » read more

Will It Work?
By Ed Sperling - 26 Jan, 2012 - Comments: 0

By Ed Sperling Estimates of how much time it takes to verify a complex SoC are still hovering around 70% of the total non-recurring engineering costs, but with more unknowns and more things to verify it’s becoming harder to keep that number from growing. Verification has always been described as an unbounded problem. You can always verify more, and just knowing when to call it quits is so... » read more

Status Report: Power-Aware Design Flow
By Ed Sperling - 12 Jan, 2012 - Comments: 0

By Ann Steffora Mutschler While the term “design flow” can be a moving target, there are some specific requirements for a low-power/power-aware tool flow. Looking at this from a high level, where is the industry today, and where is it headed? There are really two sides to power, which are almost like two sides of the same coin: power consumption and power integrity. And both of those ar... » read more

Verifying The Pieces
By Ed Sperling - 06 Jan, 2012 - Comments: 0

It’s not uncommon to hear engineers express disbelief these days that a complex device actually works. This is both a sign of amazing advancement in system-level design, as well as a scary revelation that’s surfacing from all parts of the design world. What’s behind this uncertainty is the growing complexity of devices, which has moved design well beyond the comprehension of a single e... » read more

Experts At The Table: Verification At 28nm And Beyond
By Ed Sperling - 06 May, 2011 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to discuss issues in verification at 28nm and beyond with Frank Schirrmeister, director of product marketing for system-level solutions at Synopsys, Ran Avinun, marketing group director at Cadence, Prakash Narain, president and CEO of Real Intent, and Lauro Rizzatti, general manager of EVE-USA. What follows are excerpts of that conversation. LPE... » read more

Experts At The Table: Verification At 28nm And Beyond
By Ed Sperling - 14 Apr, 2011 - Comments: 0

Low-Power Engineering sat down to discuss issues in verification at 28nm and beyond with Frank Schirrmeister, director of product marketing for system-level solutions at Synopsys, Ran Avinun, marketing group director at Cadence, Prakash Narain, president and CEO of Real Intent, and Lauro Rizzatti, general manager of EVE-USA. What follows are excerpts of that conversation. LPE: Power seems to... » read more

Verification At 28nm And Beyond
By Ed Sperling - 14 Apr, 2011 - Comments: 0

Low-Power Engineering looks at the challenges ahead in IC verification with Frank Schirrmeister of Synopsys, Ran Avinun of Cadence, Prakash Narain from Real Intent and Lauro Rizzatti from EVE. [youtube vid=bc5IhGrlJo4] » read more

Stuck In The Corners
By Ann Mutschler - 24 Feb, 2011 - Comments: 0

It’s common for semiconductor design teams to spend 60% to 70% of product development time on verification, which is why verification has bubbled to the top of the management chain as a concern. Executives worry about the predictability of their product development cycle because so much of it is dependent on successful execution of verification, the ability to achieve coverage closure and the... » read more

Drone Design Challenges
By Ed Sperling - 21 Jan, 2011 - Comments: 0

System-Level Design talks with Bob Bluth of the Naval Postgraduate School about UAV design and debug challenges--and what's inside of these devices. (The blue and green cellophane tape seal some of the access points prior to delivery--and the directions).   [youtube vid=wTsehbWwC8o] » read more

Experts At The Table: Verification Nightmares
By Ed Sperling - 13 May, 2010 - Comments: 0

By Ed Sperling Low-Power Engineering sat down with Shabtay Matalon, ESL marketing manager in Mentor Graphics’ Design Creation Division; Bill Neifert, CTO at Carbon Design Systems; Terrill Moore, CEO of MCCI Corp., and Frank Schirrmeister, director of product marketing for system-level solutions at Synopsys. What follows are excerpts of that conversation. LPE: How important is a high-leve... » read more

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