tag: Breker Verification Systems

Graphing Toward Standardization
By Brian Bailey - 24 Apr, 2014 - Comments: 0

Graph-based verification has become the hot topic of the day. It commanded a lot of attention at the recent DVCon, promises to fix many of the problems plaguing functional verification, can provide an automated way to perform system-level verification, enables portability of tests between simulation, emulation and prototyping, reduces the wastage created by constrained random test pattern gener... » read more

Big Shift In SoC Verification
By Ed Sperling - 31 Mar, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss software-driven verification with Ken Knowlson, principal engineer at Intel; Mark Olen, product manager for the Design Verification Technology Division of Mentor Graphics; Steve Chappell, senior manager for CAE technology and verification at Synopsys; Frank Schirrmeister, group director for product marketing of the System Development Suite at Cadenc... » read more

EDA Shapes Its Future
By Brian Bailey - 27 Mar, 2014 - Comments: 2

In part one of this series, Semiconductor Engineering looked at growth within the EDA industry and the types of approaches being made to expand the scope of the markets that they serve. Scope expansion comes from the creation of new tools, the growth of companies in the IP space and the various ways in which opportunities can be found in new markets. Additional growth opportunities come from so... » read more

Biggest Verification Mistakes
By Ann Mutschler - 27 Mar, 2014 - Comments: 0

[getkc id="81" kc_name="SoC"]s today have more processors and more embedded software than ever, including drivers and middleware just to get the hardware working. This, in turn, requires more and better [getkc id="10" kc_name="verification"]. Add to the challenge the fact that there is no one way to do verification and it is easy to comprehend how critical it is to for hardware and software tea... » read more

Enabling Test Portability With Graphs
By Ann Mutschler - 20 Mar, 2014 - Comments: 0

Is it time to move up again? When it comes to test portability between simulation, emulation, prototypes and silicon, as well as an easier way to create a test structure, the answer appears to be a resounding ‘Yes.’ Looking at these activities from a higher level of abstraction and using a graph-based approach should allow automation where there has been none previously, and could allow val... » read more

Big Shift In SoC Verification
By Ed Sperling - 17 Mar, 2014 - Comments: 2

Semiconductor Engineering sat down to discuss software-driven verification with Ken Knowlson, principal engineer at Intel; Mark Olen, product manager for the Design Verification Technology Division of Mentor Graphics; Steve Chappell, senior manager for CAE technology and verification at Synopsys; Frank Schirrmeister, group director for product marketing of the System Development Suite at Cadenc... » read more

Big Shift In SoC Verification
By Ed Sperling - 06 Mar, 2014 - Comments: 5

Semiconductor Engineering sat down to discuss software-driven verification with Ken Knowlson, principal engineer at Intel; Mark Olen, product manager for the Design Verification Technology Division of Mentor Graphics; Steve Chappell, senior manager for CAE technology and verification at Synopsys; Frank Schirrmeister, group director for product marketing of the System Development Suite at Cadenc... » read more

10 Must Knows About Virtual Prototypes
By Brian Bailey - 27 Feb, 2014 - Comments: 1

1. What is a virtual prototype? If you ask a room full of people to define ‘system’, you will get as many answers as there are people in the room. The same is true for virtual prototypes. A virtual prototype defines a model of something that is usually created by one group and used by another with some implied abstraction. It is a prototype that exists as a software model on which analysis... » read more

EDA Hungers For Growth
By Brian Bailey - 27 Feb, 2014 - Comments: 1

Look at the top line numbers provided by the EDA industry consortium (EDAC) and it appears as if the industry is doing well. In 2010, revenue was $5.285 billion. That number increased to $6.218 billion in 2011, and again to $6.529 billion in 2012, a 9.5% annual growth rate that would satisfy most investors. But the numbers do not tell the whole story. There is an interesting divide growing betw... » read more

Do Chips Really Work The First Time?
By Brian Bailey - 13 Feb, 2014 - Comments: 3

The industry used to have survey data that showed the number of respins required for a broad swath of designs and the principle causes of those respins. That was a good indicator of where tools or processes needed to be improved. At the time, the data showed that the primary cause of respins was functional errors, and since then EDA vendors have been beefing up tools in that area. Most of th... » read more

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