tag: Cadence

2.5D Creeps Into SoC Designs
By Ed Sperling - 13 Aug, 2015 - Comments: 0

A decade ago top chipmakers predicted that the next frontier for SoC architectures would be the z axis, adding a third dimension to improve throughput and performance, reduce congestion around memories, and reduce the amount of energy needed to drive signals. The obvious market for this was applications processors for mobile devices, and the first companies to jump on the stacked die bandwag... » read more

How Long Will FinFETs Last?
By Ann Mutschler - 13 Aug, 2015 - Comments: 0

Semiconductor Engineering sat down to discuss how long FinFETs will last and where we will we go next with Vassilios Gerousis, Distinguished Engineer at [getentity id="22032" e_name="Cadence"]; Juan Rey, Sr. Director of Engineering for Calibre R&D at [getentity id="22017" e_name="Mentor Graphics"]; Kelvin Low, Senior Director Foundry Marketing at [getentity id="22865" e_name="Samsung"]; and Vic... » read more

Poised For Aspect-Oriented Design?
By Brian Bailey - 13 Aug, 2015 - Comments: 8

In 1992, [getperson id=" 11046 " comment="Yoav Hollander"] had the idea to take a software programming discipline called aspect-oriented programming (AOP) and apply it to the verification of hardware. Those concepts were incorporated into the [gettech id="31021" t_name="e"] language and [getentity id="22068" e_name="Verisity"] was formed to commercialize it. Hollander had seen that using obj... » read more

Blog Review: Aug. 12
By Jesse Allen - 12 Aug, 2015 - Comments: 0

SIM cards are protected by AES-128, which is supposed to be virtually unbeatable by a brute-force attack. But there's still a weakness: Rambus' Aharon Etengoff reports on how a researcher at Jiao Tong University exploited side-channel attack techniques to crack the encryption codes protecting 3G and 4G SIM cards. After recent reports on compromised car security, auto makers are likely search... » read more

Making Hardware Design More Agile
By Ed Sperling - 12 Aug, 2015 - Comments: 1

Semiconductor engineering sat down to whether changes are needed in hardware design methodology, with Philip Gutierrez, ASIC/FPGA design manager in [getentity id="22306" comment="IBM"]'s FlashSystems Storage Group; Dennis Brophy, director of strategic business development at [getentity id="22017" e_name="Mentor Graphics"]; Frank Schirrmeister, group director for product marketing of the System ... » read more

The Week In Review: Design/IoT
By Jesse Allen - 07 Aug, 2015 - Comments: 0

Tools Cadence unveiled Joules, its new RTL power analysis solution. The tool performs design synthesis using a new integrated prototype mode of Cadence's Genus Synthesis product, including physically aware clock tree and datapath buffering, and enabling accurate RTL power estimation. IP Synopsys and ASMedia completed a successful interoperability demonstration of Synopsys' USB 3.1 Devi... » read more

5 Things To Know About The IoT
By Ed Sperling - 06 Aug, 2015 - Comments: 0

The IoT means many things to many people. While the numbers and projections are all very large, the views of what it actually means are vastly different because it can include anything from a sensor in a car or an ingestible medical device to a data center full of servers and the connectivity in between. But there are some interesting shifts under way, both driving the [getkc id="76" comment... » read more

How IoE Will Alter Supply Chains
By Ernest Worthman - 06 Aug, 2015 - Comments: 0

Globalization is a double-edged sword. Without a doubt, it nourishes competition, offers a plethora of independent sources, and bounty of supplies from a global pool of vendors. That is the good side. The downside is that control becomes a management nightmare. Well-oiled, traditional supply chains systems will have to be redesigned to function across a variety of variables that can interrupt t... » read more

Blog Review: Aug. 5
By Jesse Allen - 05 Aug, 2015 - Comments: 0

Fresh from the July 2015 Type-C InterOp Event, where USB engineers wheel a prototype on a cart from hotel room to hotel room, testing interoperability, Synopsys' Morten Christiansen says Type-C has arrived. Mentor's Colin Walls discusses the reasons to tackle embedded software development with a bottom-up approach. In their latest video, Cadence's Kishore Kasamsetty discusses why choose L... » read more

Speeding Up Analog
By Ann Mutschler - 05 Aug, 2015 - Comments: 1

Semiconductor Engineering sat down to discuss analog design and how to speed up analog circuits with Kurt Shuler, vice president of marketing at Arteris; Bernard Murphy, CTO at Atrenta; Wilbur Luo, senior group director, product management for custom IC and PCB at Cadence; Brad Hoskins, director, IC design, microcontrollers at Freescale; and Jeff Miller, product manager at Tanner EDA. What foll... » read more

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