tag: HBM

HBM2E Raises The Bar For AI/ML Training
By Frank Ferro - 11 Mar, 2021 - Comments: 0

The largest AI/ML neural network training models now exceed an enormous 100 billion parameters. With the rate of growth over the last decade on a 10X annual pace, we’re headed to trillion parameter models in the not-too-distant future. Given the tremendous value that can be derived from AI/ML (it is mission critical to five of six of the top market cap companies in the world), there has been ... » read more

Chiplets For The Masses
By Brian Bailey - 03 Mar, 2021 - Comments: 2

Chiplets are a compelling technology, but so far they are available only to a select few players in the industry. That's changing, and the industry has taken little steps to get there, but timing for when you will be able to buy a chiplet to integrate into your system remains uncertain. While new fabrication nodes continue to be developed, scaling is coming to an end, be it for physical or e... » read more

Usage Models Driving Data Center Architecture Changes
By Ann Mutschler - 11 Feb, 2021 - Comments: 0

Data center architectures are undergoing a significant change, fueled by more data and much greater usage from remote locations. Part of this shift involves the need to move some processing closer to the various memory hierarchies, from SRAM to DRAM to storage. There is more data to process, and it takes less energy and time to process that data in place. But workloads also are being distrib... » read more

Pushing The Envelope With HBM2E Memory
By Joseph Rodriguez - 10 Dec, 2020 - Comments: 0

In September, Rambus announced the achievement of reaching 4 gigabits per second (Gbps) operation with our HBM2E memory interface. This milestone was demonstrated in silicon and required mastering substantial signal integrity and power integrity (SI/PI) challenges. The 4 Gbps mark represents a 20% rise from the previous maximum data rate of 3.2 Gbps for HBM2E. To date, the industry’s faste... » read more

Difficult Memory Choices In AI Systems
By Ann Mutschler - 12 Nov, 2020 - Comments: 0

The number of memory choices and architectures is exploding, driven by the rapid evolution in AI and machine learning chips being designed for a wide range of very different end markets and systems. Models for some of these systems can range in size from 10 billion to 100 billion parameters, and they can vary greatly from one chip or application to the next. Neural network training and infer... » read more

System-Level Packaging Tradeoffs
By Ann Mutschler - 30 Sep, 2020 - Comments: 0

Leading-edge applications such as artificial intelligence, machine learning, automotive, and 5G, all require high bandwidth, higher performance, lower power and lower latency. They also need to do this for the same or less money. The solution may be disaggregating the SoC onto multiple die in a package, bringing memory closer to processing elements and delivering faster turnaround time. But ... » read more

Productivity Keeping Pace With Complexity
By Brian Bailey - 24 Sep, 2020 - Comments: 0

Designs have become larger and more complex and yet design time has shortened, but team sizes remain essentially flat. Does this show that productivity is keeping pace with complexity for everyone? The answer appears to be yes, at least for now, for a multitude of reasons. More design and IP reuse is using more and larger IP blocks and subsystems. In addition, the tools are improving, and mo... » read more

New Architectures, Much Faster Chips
By Ed Sperling and Ann Mutschler - 31 Aug, 2020 - Comments: 0

The chip industry is making progress in multiple physical dimensions and with multiple architectural approaches, setting the stage for huge performance increases based on more modular and heterogeneous designs, new advanced packaging options, and continued scaling of digital logic for at least a couple more process nodes. A number of these changes have been discussed in recent conferences. I... » read more

Scaling AI/ML Training Performance With HBM2E Memory
By Frank Ferro - 13 Aug, 2020 - Comments: 0

In my April SemiEngineering Low Power-High Performance blog, I wrote: “Today, AI/ML neural network training models can exceed 10 billion parameters, soon it will be over 100 billion.” “Soon” didn’t take long to arrive. At the end of May, OpenAI unveiled a new 175-billion parameter GPT-3 language model. This represented a more that 100X jump over the size of GPT-2’s 1.5 billion param... » read more

The Race To Much More Advanced Packaging
By Mark LaPedus - 23 Jul, 2020 - Comments: 2

Momentum is building for copper hybrid bonding, a technology that could pave the way toward next-generation 2.5D and 3D packages. Foundries, equipment vendors, R&D organizations and others are developing copper hybrid bonding, which is a process that stacks and bonds dies using copper-to-copper interconnects in advanced packages. Still in R&D, hybrid bonding for packaging provides mo... » read more

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