Cloud Computing Chips Changing


An explosion in cloud services is making chip design for the server market more challenging, more diverse, and much more competitive. Unlike datacenter number crunching of the past, the cloud addresses a broad range of applications and data types. So while a server chip architecture may work well for one application, it may not be the optimal choice for another. And the more those tasks beco... » read more

Blog Review: April 19


Mentor's Tom Fitzpatrick explains what the Portable Stimulus standard will do, what it won't, and why the choice of input language defined by the standard matters. Cadence's Paul McLellan listens in as IRDS chairman Paolo Gargini explains how long it takes technology breakthroughs to make out of the lab and into high-volume manufacturing. Synopsys' Robert Vamosi points to the recent sound... » read more

Power/Performance Bits: April 18


Cooling hotspots Engineers at Duke University and Intel developed a technology to cool hotspots in high-performance electronics. The new technology relies on a vapor chamber made of a super-hydrophobic floor with a sponge-like ceiling. When placed beneath operating electronics, moisture trapped in the ceiling vaporizes beneath emerging hotspots. The vapor escapes toward the floor, taking hea... » read more

The Hunt For A Low-Power PHY


Physics has been on the side of chipmakers throughout most of the lifetime of [getkc id="74" comment="Moore's Law"], but when dealing with the world outside the chip, physics is working against them. Pushing data at ever-faster rates through boards and systems consumes increasing amounts of power, but the power budget for chips has not been increasing. Could chips be constrained by their int... » read more

Time For Massively Parallel Testing


Time is money in electronics, as in other industries, and the more time that is invested in testing chips means more costs being added to the product in question. To speed up testing for memory devices and other semiconductors, test equipment vendors have resorted to parallel testing technology, simultaneously testing multiple chips at a time. The industry also is turning to system-level tes... » read more

Electroplating IC Packages


The electrochemical deposition (ECD) equipment market for IC packaging is heating up as 2.5D, 3D and fan-out technologies begin to ramp. [getentity id="22817" e_name="Applied Materials"]  recently rolled out an ECD system for IC packaging. In addition, Lam Research, TEL and others compete in the growing but competitive ECD equipment market for packaging. ECD—sometimes referred to as pl... » read more

LiDAR Completes Sensing Triumvirate


Fully autonomous vehicles of the future will depend on a combination of different sensing technologies – advanced vision systems, radar, and light imaging, detection, and ranging (LiDAR). Of the three, LiDAR is now the costliest part of that equation, and there are worldwide efforts to bring down those costs. Mechanical LiDAR units are currently available, priced in the hundreds of dollars... » read more

The Week In Review: Manufacturing


Chipmakers At an event, Intel’s Technology and Manufacturing group outlined the company's vision. As part of the event, Intel reiterated what many are saying—the current node designations are meaningless and misleading. “For example, Intel estimates that its 14nm solution that has been out in the market since 2014 should be equal to 10nm solutions released by competitors in the near futu... » read more

Learn From The Experts


I visited SNUG Silicon Valley last week. This annual Synopsys User Group event at the Santa Clara Convention Center is always a good way to get in touch with the end users of various EDA products. I attended the technical track with experts from ARM, NVIDIA, Intel and Synopsys, who talked about their experience in accelerating software development, hardware verification and system validation... » read more

Supporting CPUs Plus FPGAs (Part 1)


While it has been possible to pair a CPU and FPGA for quite some time, two things have changed recently. First, the industry has reduced the latency of the connection between them and second, we now appear to have the killer app for this combination. Semiconductor Engineering sat down to discuss these changes and the state of the tool chain to support this combination, with Kent Orthner, system... » read more

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