tag: STMicroelectronics

Bridging IP With Verification Standards
By Ann Mutschler - 21 Oct, 2010 - Comments: 0

By Ann Steffora Mutschler Standards body Accellera is sounding the gong to summon all verification IP providers to check out its efforts in connection with IP-XACT -- IEEE 1685, "Standard for IP-XACT, Standard Structure for Packaging, Integrating and Re-Using IP Within Tool-Flows” – with verification IP. The IP-XACT technical committee has been busy over the past year. Formerly an effor... » read more

User Perspective: Hardware-Software Co-Design
By Ed Sperling - 07 Oct, 2010 - Comments: 0

By Ann Steffora Mutschler With software teams today twice as large as hardware teams for any given complex SoC project, there is no doubt it is an ideal time to agree on the best way for these worlds to intersect. And even though the semiconductor industry has been actively discussing hardware-software co-design for at least a decade a mainstream solution has yet to be commercialized. Progr... » read more

End User Report: EDA Industry Realignment
By Ann Mutschler - 24 Jun, 2010 - Comments: 0

By Ann Steffora Mutschler The EDA industry has seen a number of large acquisitions as of late, most notably of Denali by Cadence, as well as CoWare, VaST and Virage Logic which were acquired by Synopsys, but just what impact does this realignment have on the biggest EDA customers? Commenting on these changes is Jean-Marc Chateau, director of system platforms and tools at STMicroelectronics, ... » read more

Design For Variability
By Ed Sperling - 24 Jun, 2010 - Comments: 0

By Ed Sperling Faced with shrinking margins, manufacturing process fluctuations that could mean one more or one less atom in a transistor and proximity issues in layout the most advanced chipmakers have begun designing for variability. Rather than working with fixed numbers, such as voltage, power and area, the goal of DFV is basically averaging all of these numbers. While this includes som... » read more

Stressing Over 3D
By Ed Sperling - 24 Jun, 2010 - Comments: 0

By David Lammers Pol Marchal recalls putting a stacked 3D prototype on his desk at IMEC in Leuven, Belgium, last year, which a visitor picked up and examined two months later. “I don’t think this chip will work,” the visitor said, causing Marchal, principal scientist at IMEC’s 3D system integration program, to put the stacked die under a microscope. Sure enough, Pol found that mechanic... » read more

Field Solvers To The Rescue
By Ed Sperling - 25 Mar, 2010 - Comments: 0

By Pallab Chatterjee Field solvers have always been part of the Parasitic Extraction (PEX) world, but due to their long run times and complexity in configuration, their role was relegated to the setup/reference table generation for the pattern based 1-D and 2-D RC extraction tools. That’s about to change. Mentor, in combination with STMicroelectronics, one of it customers, said that at ... » read more

Journey To The Center Of The Ecosystem
By Ed Sperling - 14 Jan, 2010 - Comments: 0

From the outside it looks like business as usual, but the race for board seats on the GSA has become particularly competitive this year. GSA originally was created as an organization for fabless companies, but you wouldn’t know that looking at its membership roster. It has evolved into a who’s who of the entire semiconductor supply chain, including everyone from foundries like TSMC and... » read more

The Ins And Outs Of Power Conversion
By Ed Sperling - 10 Dec, 2009 - Comments: 0

By Cheryl Ajluni Power conversion is a general term that refers to a system or device producing an output that is different than its input. It can assume many forms—everything from an inverter to an isolated power supply, uninterruptable power supply (UPS), or AC/DC converter. Power conversion, like low-power design, is fairly commonplace these days. Nevertheless, recent advances in digital ... » read more

3D Integration: Extending Moore’s Law Into The Next Decade
By Cheryl Ajluni - 27 Aug, 2009 - Comments: 0

By Cheryl Ajluni At the 46th Design Automation Conference in San Francisco last month, attention turned to a discussion of how to extend the momentum of Moore’s Law into the next decade. One plausible solution, according to Philippe Magarshack, the general manager of Central CAD & Design Solutions at STMicroelectronics, is 3D stacking for complex System-on-Chips (SoCs). The concept of 3... » read more

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