STMicroelectronics’ Implementation Of The STAR Hierarchical System And IEEE 1500 Wrapping

By Synopsys - 01 Nov, 2017 - Comments: 0

This white paper discusses various IEEE 1500 architectures that STMicroelectronics has deployed using the Synopsys DesignWare STAR Hierarchical System test solution. STAR Hierarchical System allows users to optimize test time on system-on-chips that use multiple cores. The white paper provides guidelines on interface IP wrapping with IEEE 1500 to improve test time. In addition, it discusses the... » read more

High Performance, Low Power, And Test: DFT’s Impact On System PPA And Safety

By Rob Knoth - 12 Oct, 2017 - Comments: 0

Back in the day, test was an afterthought in system design and implementation. It was a separate task that could be added to the end of a project schedule—essentially, a checkbox before sending a design for manufacture or during product qualification. Nowadays, test is no longer an afterthought, and we’ll see it continue to grow in importance. Safety-critical semiconductor applications h... » read more

Improving Yield, Reliability With Data

By Ann Mutschler - 11 Oct, 2017 - Comments: 0

Big data techniques for sorting through massive amounts of data to identify aberrations are beginning to find a home in semiconductor manufacturing, fueled by new requirements in safety-critical markets such as automotive as well as the rising price of packaged chips in smartphones. Outlier detection—the process of finding data points outside the normal distribution—isn't a new idea. It ... » read more

The 2017 International Test Conference

By Jeff Dorsch - 09 Oct, 2017 - Comments: 0

Machine learning is a hot topic at many technical conferences this year. It will be true at the upcoming International Test Conference, which opens near the end of this month in Fort Worth, Texas. On Sunday, October 29, there are two tutorials devoted to machine learning. Monday, October 30, will have one tutorial related to the topic. The conference gets fully under way on Halloween, wit... » read more

Is It Safe To Assume That All “Passed” Die Are Actually “Good” Die?

By Guy Cortez - 09 Oct, 2017 - Comments: 0

In a world where Quality and Brand Protection is King, as certainly is the case for the automotive and medical device industries where strict minimal DPPM (defective parts per million) requirements are a common constraint, new methods for “escape” prevention and outlier detection are constantly being evaluated and implemented by semiconductor vendors to prevent any defective or marginal par... » read more

Thunderbolt 3 Remote Control Of PXI Test Systems

By NI - 09 Oct, 2017 - Comments: 0

The new PXIe-8301 remote control module is the industry’s first solution for laptop control of PXI systems using Thunderbolt 3 technology. With its contemporary connectivity and low cost, the PXIe-8301 makes high-performance control of PXI systems more accessible and affordable to engineers performing benchtop characterization and validation or developing portable automated test systems. T... » read more

How To Make Autonomous Vehicles Reliable

By Ann Mutschler - 11 Sep, 2017 - Comments: 1

The number of unknowns in automotive chips, subsystems and entire vehicles is growing as higher levels of driver assistance are deployed, sparking new concerns and approaches about how to improve reliability of these systems. Advanced Driver Assistance Systems (ADAS) will need to detect objects, animals and people, and they will be used for parking assistance, night vision and collision avoi... » read more

Astronics Ballard Technology OmniBus II PXI Express Product for Avionics Test

By NI - 11 Sep, 2017 - Comments: 0

The OmniBus II PXIe databus interface products combine the standard PXIe interface with MIL-STD-1553 and ARINC 429 Avionics Data Bus interfaces. Interface cards can be ordered with either MIL-STD-1553 only, ARINC 429 only, or both interfaces on the same card. The PXIe interface includes a PCIe x1 interface to the controller as well as support for PXI clock, timing and trigger signals. The inclu... » read more

The Rising Value Of Data

By Ed Sperling - 09 Aug, 2017 - Comments: 0

The volume of data being generated by a spectrum of devices continues to skyrocket. Now the question is what can be done with that data. By Cisco's estimates, traffic on the Internet will be 3.3 zetabytes per year by 2021, up from 1.2 zetabytes in 2016. And if that isn't enough, the flow of data isn't consistent. Traffic on the busiest 60-minute period in a day increased 51% in 2016, compare... » read more

Module Testing Adds New Challenges

By Jeff Dorsch - 07 Aug, 2017 - Comments: 1

System-in-package (SiP) and other advanced packaging technologies are putting more components together in tighter spaces than previously seen. Often these packages are contained in a module, which is something more than a chip package and a great deal smaller than most printed circuit boards. Testing these modules often requires system-level test. These modules typically will be inserted int... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?