Panel-Level Packaging’s Second Wave Meets Engineering Reality


Key Takeaways Panel-level packaging is arriving not because the engineering is ready, but because wafer-level economics are breaking down. Glass improves the warpage and dimensional stability problems of organic substrates but introduces a different class of failure modes that require materials solutions, not process adjustments. The central challenges of panel-level processing are m... » read more

Innovations Driving The Advanced Packaging Roadmap: Part One


Advanced IC substrates (AICS) have been marching toward the 2µm line/space (L/S) redistribution layer (RDL) technology node for some time (figure 1). However, many questions remain about the ability of organic substrates to meet the line/space requirements of the next generation of advanced packages (AP), those below 2µm L/S and perhaps to 1.5µm L/S. Simply put: are organic substrates up to ... » read more

The Long Climb: Bringing Through Glass Vias (TGV) To High-Volume Manufacturing


The semiconductor industry is a land of peaks and valleys. It’s a place where each innovation represents the culmination of a long and often difficult climb to the summit. In the case of glass substrates, the peak of the mountain is in sight. The arrival of glass substrates comes at an opportune time, as the industry eyes new process innovations to meet the incredible demand for high perfo... » read more

Research Bits: Aug. 30


Through glass vias Researchers from the Chinese Academy of Sciences (CAS) developed a Through Glass Via (TGV) process for 3D advanced packaging, which they say enables low transmission loss and high vacuum wafer-level packaging of high-frequency chips and MEMS sensors. TGV is a vertical interconnection technology applied in wafer-level vacuum packaging. The researchers found that it has goo... » read more