New papers added to the technical library: buried power rails; DL architecture eval; computing-in-memory; analog circuit sizing w/DNN; RISC-V cryptography; ISO 26262; reconfigurable intelligence surfaces for wireless; energy-efficiency for training/inference; verification in SoCs at RTL
New technical papers added to Semiconductor Engineering’s library this week.
| Technical Paper | Research Organizations | |
|---|---|---|
| A Holistic Evaluation of Buried Power Rails and Back-Side Power for Sub-5 nm Technology Nodes | UT Austin, Arm Research, and imec | |
| Gemmini: Enabling Systematic Deep-Learning Architecture Evaluation via Full-Stack Integration | UC Berkeley and a co-author from MIT, with partial funding from DARPA | DAC 2021 Best Paper |
| Polynesia: Enabling High-Performance and Energy-Efficient Hybrid Transactional/Analytical Databases with Hardware/Software Co-Design | ETH Zurich, Google and Univ. of Illinois Urbana-Champaign | |
| A compute-in-memory chip based on resistive random-access memory | Stanford, UCSD, University of Pittsburgh, University of Notre Dame and Tsinghua University | |
| DNN-Opt: An RL Inspired Optimization for Analog Circuit Sizing using Deep Neural Networks | University of Texas at Austin, Intel, University of Glasgow | Best paper candidate at DAC 2021 |
| Symmetric Cryptography on RISC-V: Performance Evaluation of Standardized Algorithms | Intel, North Arizona University and Google, with partial funding from U.S. Air Force Research Laboratory | |
| Safety-Oriented System Hardware Architecture Exploration in Compliance with ISO 26262 | National Taipei University | |
| Reconfigurable Intelligent Surfaces for Wireless Communications: Overview of Hardware Designs, Channel Models, and Estimation Techniques | IEEE researchers | |
| Great Power, Great Responsibility: Recommendations for Reducing Energy for Training Language Models | MIT and Northeastern University | |
| A Formal Approach to Confidentiality Verification in SoCs at the Register Transfer Level | TU Kaiserslautern, Germany | Winner of Intel’s Hardware Security Academic Award program |
Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us posting links to papers.
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