Neuromorphic nanowire networks; EUV lithography; memristive devices for in-memory computing; silicon vacancies in 4H SiC; HIL to bridge VP/RTL design gap; verification using near-field EM analysis; mapping surface charge dynamics; Intel’s LLM inference on CPUs.
New technical papers recently added to Semiconductor Engineering’s library:
| Technical Paper | Research Organizations |
|---|---|
| Online dynamical learning and sequence memory with neuromorphic nanowire networks | University of Sydney, UCLA, NIMS, Kyutech, and University of Sydney Nano Institute |
| Vapor-Phase Infiltrated Organic–Inorganic Positive-Tone Hybrid Photoresist for Extreme UV Lithography | Stony Brook University, Brookhaven National Laboratory, and University of Texas at Dallas |
| Exploiting the State Dependency of Conductance Variations in Memristive Devices for Accurate In-Memory Computing | IBM Research |
| Virtual-Peripheral-in-the-Loop : A Hardware-in-the-Loop Strategy to Bridge the VP/RTL Design-Gap | University of Bremen and German Research Center for Artificial Intelligence |
| Spin-acoustic control of silicon vacancies in 4H silicon carbide | Harvard University and Purdue University |
| Contact-Less Integrity Verification of Microelectronics Using Near-Field EM Analysis | University of Florida and Brookhaven National Laboratory |
| Efficient LLM Inference on CPUs | Intel |
| High-speed mapping of surface charge dynamics using sparse scanning Kelvin probe force microscopy | ORNL, Sungkyunkwan University, Case Western Reserve University, Flinders University, Bedford Park, and UNSW Sydney |
More Reading
Technical Paper Library home
Leave a Reply