Week In Review: Manufacturing, Test

Silent data errors, DFT, and testing 2.5/3D at ITC, Intel’s Innovation conference, industry advisors for CHIPS Act, 5G smart factory collaboration.


Highlights from ITC

The hot topic at this week’s International Test Conference (ITC) was tackling silent data corruption, with panel discussions, papers, and Google’s Parthasarathy Ranganathan’s keynote address all emphasizing the urgency of the issue. In the past two years Meta, Google, and Microsoft have reported on silent errors, errors not detected at test, which are adversely impacting operations. Manufacturing defects are a potential cause. But the challenges of deciphering the cause from software runs is something the test community has not faced before. Engineers are exploring maximizing current methods, on-die telemetry data, and running software snippets on manufacturing test systems. Other high-interest topics at ITC include testing multi-device packages, power aware testing, and streaming and packetizing scan vectors.

Synopsys debuted a new streaming fabric technology aimed at shortening data access and test time by up to 80%. Generated by Synopsys TestMAX DFT design-for-test tool and part of Synopsys’ silicon lifecycle management flow, the fabric is an on-chip network that quickly transports silicon data to and from multiple design blocks and multi-die systems, reducing the time to efficiently test and analyze the chip for anomalies and failures. “Efficient, cost-effective silicon data access is a fundamental requirement to achieving reliable device operation during their lifecycles, which is essential for high uptime of mission-critical applications,” said Amit Sanghani, senior vice president of the Synopsys Hardware Analytics and Test team. “Our new streaming fabric and more accurate power-estimation capabilities further strengthen our Silicon Lifecycle Management family of products, ensuring customers can meet these goals while achieving design and schedule targets.”

Siemens EDA introduced Tessent Multi-die software, a DFT automation solution designed to rapidly generate IEEE 1838-compliant programs for 2.5D and 3D-IC architectures. It works seamlessly with Siemens’ Tessent TestKompress Streaming Scan Network software and Tessent IJTAG software, which optimize DFT test resources for each block without affecting to the rest of the design, thereby streamlining DFT planning and implementation. “IC design organizations are seeing dramatic spikes in IC test complexity due to the rapid adoption and deployment of designs featuring densely packed dies in 2.5D and 3D devices,” said Ankur Gupta, vice president and general manager of the Tessent business unit for Siemens Digital Industries Software. “With Siemens’ new Tessent Multi-die solution, our customers can be ready for the designs of tomorrow, while slashing test implementation effort and simultaneously optimizing manufacturing test cost today.”

Start-up Xallent, an offshoot of Cornell University, attracted attention with its promise of nano-electro-mechanical-systems (NEMS) and MEMS multi-tip probes that can test nanoscale structures 300x faster than current tips.

Government and Regulatory

The U.S. Department of Commerce appointed 24 members to the Industrial Advisory Committee (IAC), an advisory body that will advise on R&D program, science and tech needs, and opportunities for public-private partnerships funded through CHIPS for America. The committee’s chair is Mike Splinter, former CEO of Applied Materials and the vice chair is Susan Feindt, a fellow and executive at Analog Devices. Also on the committee are Deirdre Hanford, chief security officer at Synopsys, Ken Joyce, executive vice president of Brewer Science, Raj Jammy, CTO of MITRE Engenuity, and Alex Oscilowski, president of TEL America.

The SIA is in Geneva urging the WTO to expand the Information Technology Agreement (ITA) for the second time. One goal is to begin negotiations for an ITA-3 ahead of the WTO’s 13th Ministerial Conference (MC13) in about 18 months. Nearly 50 industry associations from Bangladesh to Bahrain, representing millions of workers around the world, have signed a global industry statement committing to “work closely with our governments to launch a new round of ITA negotiations by MC13 that will expand trade, stimulate growth, increase jobs, spur innovation, and enhance supply chain resilience.”


Intel posted video and highlights from its recent Innovation conference, including the announcement of its 13th Gen Intel Core processor family, led by the 13th Gen Intel Core i9-13900K. The new 13th Gen Intel Core family includes six new unlocked desktop processors with up to 24 cores, 32 threads, and clock speeds up to 5.8 GHz.

ASE participated in a kick-off event for a 5G mmWave NR-DC SA (New Radio-Dual Connectivity Standalone) smart factory collaboration. “We are collaborating with the best-in-class from the government, industry, academia and research institutions to craft a 5G smart factory blueprint that optimizes technologies in 5G mmWave NR-DC SA and establishes an open platform with integration software/hardware and smart systems,” said Tien Wu, CEO of ASE. The effort is supported by the Industrial Development Bureau and Qualcomm and comprises the Institute for Information Industry, Asia Pacific Telecom, DEVCORE Security Consulting and the National Cheng Kung University’s Intelligent Manufacturing Research Center.

The Department of Defense (DoD) awarded Skywater up to $99 million to enable qualification and production of strategic radiation-hardened (rad-hard) electronics. SkyWater completed the base prototype project for its 90 nm rad-hard process (RH90), part of a previous $170 million award.

MediaTek is set to mass produce its new HPC chips at TSMC in 2023 using an advanced process node and CoWoS (chip on wafer on substrate) packaging technology.

Equipment and materials

CyberOptics launched a new ReticleSense Auto Teaching System (ATSR), a multi-camera sensor and CyberSpectrum software solution that enable proper alignment, calibration and set-up of reticles on semiconductor processing tools. The sensor “sees” inside to capture three dimensional off-set data (x, y and z) in real-time to quickly teach reticle transfer positions. It allows process and equipment engineers to conduct repeatable and reproducible setup and maintenance checks, speed trouble-shooting, and eliminate technician-dependent variation.

Market research

The 11th annual eBeam Initiative Luminaries survey revealed that increasing EUV lithography adoption is increasing revenues for multibeam mask writing tools. Some 78 percent of respondents believe EUVL is contributing to photomask revenue growth in 2022. “Practically speaking, production EUV masks are all being written by multi-beam writers. “Once you have a multi-beam mask writer, there’s no reason not to also take advantage of the benefits of curvilinear ILT to improve process windows on the wafer. As a result, luminaries are also predicting curvilinear masks to be the future of leading-edge mask making,” said Aki Fujimura, CEO of D2S, the managing company sponsor of the eBeam Initiative.

TECHCET’s current forecasts the wet chemical market will reach US $4.2 billion this year, up 6.7% over 2021. Detailed information is provided in the 2022 Wet Chemicals Critical Materials Market Report.

Further reading
Check out the Test, Measurement & Analytics newsletter and the Manufacturing, Packaging & Materials newsletter for these highlights and more:

o Making 5G More Reliable
o Improving Redistribution Layers For Fan-Out Packages And SiPs
o Enabling Test Strategies For 2.5D, 3D Stacked ICs
o The Drive Toward More Predictive Maintenance
o Big Changes In Architectures, Transistors, Materials
o How to Compare Chips

Upcoming events:

  • IEEE/ACM International Symposium on Microarchitecture (MICRO), Oct. 1-5 (Chicago, IL)
  • Samsung Foundry Forum & SAFE Forum 2022, U.S. Oct. 3-4; EMEA Oct. 7; Japan Oct. 18; Korea Oct. 20; China Oct. 21-Dec. 31
  • iMAPS-55th International Symposium on Microelectronics, Oct. 3 – 6 (Boston, MA)
  • Semicon China, Oct. 5-7 (Shanghai, China)
  • Arm DevSummit 2022, Oct. 26 –27 (San Francisco, CA)
  • IEEE ISICAS 2022: International Symposium on Integrated Circuits, Oct. 20 –21, (Bordeaux, France)
  • SEMI Pacific Northwest Forum, Nov. 3 (Beaverton, OR)

Leave a Reply

(Note: This name will be displayed publicly)