Lots Of Little Knobs For Power


Dynamic power is becoming a much bigger worry at new nodes as more finFETs are packed on a die and wires shrink to the point where resistance and capacitance become first-order effects. Chipmakers began seeing dynamic power density issues with the first generation of [getkc id="185" kc_name="finFETs"]. While the 3D transistor structures reduced leakage current by providing better gate contro... » read more

Multi-Physics Combats Commoditization


The semiconductor industry has benefited greatly from developments around digital circuitry. Circuits have grown in size from a few logic gates in the 1980s to well over 1 billion today. In comparison, analog circuits have increased in size by a factor of 10. The primary reason is that digital logic managed to isolate many of the physical effects from functionality, and to provide abstractions ... » read more

Power/Performance Bits: May 16


Chaos-based IC Researchers at North Carolina State University and the College of Wooster developed a three transistor nonlinear, chaos-based integrated circuit combining digital and analog components, which they hope can improve computational power by enabling processing of a larger number of inputs. In chaos-based, nonlinear circuits, one circuit can perform multiple computations instead... » read more

Design For Noise (DfN)


By Riko Radojcic and Yanfeng Li Abstract: This white paper describes the typical characteristics of electrical noise, and summarizes the current standard practices for managing noise in semiconductor devices. The impact of the technology trends – and specifically CMOS scaling - on noise amplitude and circuit sensitivity to noise are presented, and the requirements for coping with this emergi... » read more

Sampling Quality – General Analog Concepts


This tutorial is part of the NI Analog Resource Center. Each tutorial will teach you a specific topic by explaining the theory and giving practical examples. This tutorial covers the basics of analog sampling quality. Topics discussed in this white paper: Resolution Measurement Sensitivity Accuracy and Example Accuracy Calculations Difference between Precision and Accuracy Noise ... » read more

Why Do You Need Chip-Package-System Co-Design And Co-Analysis?


Whether it is the need for sustainable energy, or driving performance while keeping power at bay, or enabling safe and reliable operation of any electronic system, containment of electronic noise — power and signal noise is critical to all of the above. Other factors that impact safe and reliable operation are electromigration (EM), electromagnetic interference (EMI) and mechanical stress ena... » read more

Noise Killed My Chip


In the past, noise was considered an annoyance, especially for analog circuitry. But today chips are actually failing because insufficient analysis was performed. Noise types that used to be second-order effects are becoming primary factors that have to be considered. This is happening at the same time that noise margins are getting smaller, both in the amplitude and temporal dimensions. It ... » read more

Building A Better Resonator


The resonant frequency of a beam depends on the mass and stiffness of the beam. Resonance has always been important in the design of musical instruments and amplification systems, as well as the design of bridges and buildings. With the advent of MEMS fabrication techniques, though, came the ability to create very small beams, in the micron or nanometer size range, with resonant frequencies... » read more

SCREAMER: A Demonstrator Chip For Spectral Noise Optimization By Clock Latency Scheduling


This paper outlines the design and measurement of a 130 nm test chip named SCREAMER for reducing the digital switching noise in synchronous circuits. Clock latency scheduling has been investigated as a means to optimize switching noise in the frequency domain through PDN simulation. Integrated in parallel on the chip are four instances of a test design, each addressing a distinct strategy of cl... » read more

Working With FinFETs


One of the key technology trends driving semi-conductor industry is the adoption of finFET processes. As opposed to a traditional planar transistor, the finFET has an elevated channel or “fin,” which the gate wraps around. Due to their structure, finFETs generate much lower leakage power and allow greater device density. Compared to planar transistors, finFET operate at a lower voltage and ... » read more

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