tag: NYU

HW Security Bug Characteristics in Google’s OpenTitan Silicon Root Of Trust Project 
By Technical Paper Link - 15 Feb, 2024 - Comments: 0

A technical paper titled “An Investigation of Hardware Security Bug Characteristics in Open-Source Projects” was published by researchers at NYU Tandon School of Engineering and University of Calgary. Abstract: "Hardware security is an important concern of system security as vulnerabilities can arise from design errors introduced throughout the development lifecycle. Recent works have pro... » read more

Chip Industry’s Technical Paper Roundup: June 5
By Linda Christensen - 05 Jun, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=105 /] More Reading Technical Paper Library home » read more

Issues and Opportunities in Using LLMs for Hardware Design
By Technical Paper Link - 01 Jun, 2023 - Comments: 0

A technical paper titled "Chip-Chat: Challenges and Opportunities in Conversational Hardware Design" was published by researchers at NYU and University of New South Wales. Abstract "Modern hardware design starts with specifications provided in natural language. These are then translated by hardware engineers into appropriate Hardware Description Languages (HDLs) such as Verilog before syn... » read more

Chip Industry’s Technical Paper Roundup: Dec. 5
By Linda Christensen - 05 Dec, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=67 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for u... » read more

Hardware Trojans Target Coherence Systems in Chiplets (Texas A&M / NYU)
By Technical Paper Link - 01 Dec, 2022 - Comments: 0

A technical paper titled "Hardware Trojan Threats to Cache Coherence in Modern 2.5D Chiplet Systems" was published by researchers at Texas A&M University and NYU. Abstract: "As industry moves toward chiplet-based designs, the insertion of hardware Trojans poses a significant threat to the security of these systems. These systems rely heavily on cache coherence for coherent data communic... » read more

Chip Industry’s Technical Paper Roundup: Oct 18
By Linda Christensen - 18 Oct, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=57 /] » read more

Automating The Detection of Hardware Common Weakness Enumerations In Early Design
By Technical Paper Link - 12 Oct, 2022 - Comments: 0

A new technical paper titled "Don't CWEAT It: Toward CWE Analysis Techniques in Early Stages of Hardware Design" was published by researchers at NYU, Intel, Duke and University of Calgary. "To help prevent hardware security vulnerabilities from propagating to later design stages where fixes are costly, it is crucial to identify security concerns as early as possible, such as in RTL designs. ... » read more

The Next Incarnation Of EDA
By Brian Bailey - 25 Aug, 2022 - Comments: 0

The EDA industry has incrementally addressed issues as they arise in the design of electronic systems, but is there about to be a disruption? Academia is certainly seeing that as a possibility, but not all of them see it happening for the same reason. The academic community questioned the future of EDA at the recent Design Automation Conference. Rather than EDA as we know it going away, they... » read more

Technical Paper Round-up: August 8
By Linda Christensen - 08 Aug, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=44 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit for... » read more

Reporting and Benchmarking Process For A 2D Semiconductor FET
By Technical Paper Link - 29 Jul, 2022 - Comments: 0

New research paper titled "How to Report and Benchmark Emerging Field-Effect Transistors" was published from researchers at NIST, Purdue University, UCLA, Theiss Research, Peking University, NYU, Imec, RWTH Aachen, and others. "Emerging low-dimensional nanomaterials have been studied for decades in device applications as field-effect transistors (FETs). However, properly reporting and compar... » read more

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