The Implementation Of Embedded PVT Monitoring Subsystems In Today’s Cutting Edge Technologies

This new whitepaper from Moortec takes a comprehensive look at the Implementation of Embedded PVT Monitoring Subsystems in Today’s Cutting Edge Technologies and how this can benefit today’s advanced node semiconductor design engineers by improving the performance and reliability of SoC designs. With advances in CMOS technology, and the scaling of transistor channel lengths to nanometer (nm)... » read more

A Call To Action: How 20nm Will Change IC Design

The 20nm process node represents a turning point for the electronics industry. While it brings tremendous power, performance and area advantages, it also comes with new challenges in such areas as lithography, variability, and complexity. The good news is that these become manageable challenges with 20nm-aware EDA tools when they are used within end-to-end, integrated design flows based on a ... » read more

Experts At The Table: IC Manufacturing Challenges

By Mark LaPedus Semiconductor Manufacturing & Design sat down to discuss future manufacturing challenges with Carlos Mazure, chief technical officer at Soitec; Jeff Hebb, vice president of laser product marketing at Ultratech; Markus Wimplinger, corporate technology development and IP director at EV Group; and Girish Dixit, vice president of the customer integration center and process inte... » read more

Dealing With Variability

By Barry Pangrle Process, voltage and temperature, a.k.a. PVT, are well known to designers who are working to complete “signoff” for their designs. In order for a design to be production-ready, it’s necessary to ensure that the design is going to yield parts at a sufficiently high percentage for profitability and that it will still operate within the expected variation of the process and... » read more