How SW and HW Vulnerabilities Can Complement LLM-Specific Algorithmic Attacks (UT Austin, Intel et al.)


A new technical paper, "Cascade: Composing Software-Hardware Attack Gadgets for Adversarial Threat Amplification in Compound AI Systems," was published by the University of Texas, Austin, Intel Labs, Symmetry Systems, Microsoft and Georgia Tech. Abstract "Rapid progress in generative AI has given rise to Compound AI systems - pipelines comprised of multiple large language models (LLM), so... » read more

Bias- and Temperature-Dependent Noise Measurements to Investigate Carrier Transport at the Tellurium Interface (POSTECH)


A new technical paper, "Revealing and Engineering Contact-Origin Noise in Ultrathin Tellurium Transistors," was published by researchers at Pohang University of Science and Technology. Abstract "Tellurium (Te) has emerged as a promising p-type semiconductor for ultrathin electronics owing to its strong air stability, excellent hole transport, narrow bandgap, and BEOL-integration compatibi... » read more

Chip Industry Week In Review


War impacts The Iran War's toll on the chip industry is widening. Over 95% of Taiwan's energy is imported, causing the country to secure alternative sources. Korea is also heavily dependent on energy imports from the Middle East. Shortages of key materials are cropping up everywhere. Helium from Qatar, the second largest producer behind the U.S., is constrained by hostilities in the Per... » read more

Quantifying The Impact Of Gravity On Strip Warpage Across Assembly Stages


The mechanical behavior of electronic packages is an important consideration at each stage of the assembly process. Many packages are assembled in strip format, making strip warpage a critical challenge for manufacturability and yield. Accurate simulations for strip warpage are an effective tool to determine what factors cause large warpages and to explore solutions before assembly. In these si... » read more

Exploring The Frontiers Of Lithography And Patterning: Highlights From SPIE Advanced Lithography + Patterning 2026


Leading‑edge system-on-chip (SoC) designs at deep submicron nodes are stretching lithography and patterning capabilities across the entire manufacturing flow. Extreme ultraviolet (EUV) lithography has become central to printing advanced features, using high‑power pulsed lasers to generate a plasma light source and reflective optics to project mask patterns onto the wafer. As error budgets t... » read more

Process Model Precision: Calibrating For Accurate Predictions Of FinFET Device Profiles


In modern semiconductor process integration, rapid and well-informed path finding is essential for on-time product release. Virtual Design of Engineering (DOE) and predictive modeling can expose integration risks early; however, their value depends on accurate process models calibrated to real fab behavior.1 Reliable prediction requires strong correlations between model inputs and measurable... » read more

Scaling AI Infrastructure: Overcoming Interconnect Bottlenecks Via CPO And Heterogeneous Integration


The rapid evolution of Artificial Intelligence (AI) has surpassed the capabilities of traditional monolithic compute architectures. The industry is shifting toward a systemic approach, where large-scale distributed clusters of GPUs/AI accelerators function as a single, unified computational engine to support the next generation of trillion-parameter models. Co-packaged optics (CPO) offers s... » read more

Liquid Cooling Drives Other Localized Cooling


Key Takeaways: When converting from air to liquid cooling, components without liquid may become too hot. An entire board or system must undergo thermal analysis to ensure that any components that were once cool enough remain cool. Alternative cooling techniques may be needed for components without liquid cooling. Liquid cooling is proving effective at cooling high-power chip... » read more

2D Semiconductors Inch Forward


Key Takeaways: Diffusing oxygen into 2D materials can improve adhesion properties. Channel-last processes can preserve most of the traditional gate-all-around process flow. Dual-gate MoS2 FETs with graphene contacts take advantage of layer transfer methods. Transition metal dichalcogenides (TMDs) have come a long way since exfoliated flakes were the state of the art, but the... » read more

Aligning The Semiconductor Value Chain In A Virtuous AI Cycle At SEMICON Korea 2026


By Samer Bahou and Jaegwan Shim As the global semiconductor industry enters a decisive new phase shaped by artificial intelligence, SEMICON Korea 2026 convened the ecosystem from February 11–13 in Seoul, bringing together the companies, technologies, and talent required to sustain momentum on both sides of the AI equation: using AI to transform semiconductor operations, and advancing sem... » read more

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