A Comparative Evaluation Of DRAM Bit-Line Spacer Integration Schemes

By Dempsey Deng - 16 Mar, 2023 - Comments: 0

With decreasing dynamic random-access memory (DRAM) cell sizes, DRAM process development has become increasingly difficult. Bit-line (BL) sensing margins and refresh times have become problematic as cell sizes have decreased, due to an increase in BL parasitic capacitance (Cb). The main factor impacting Cb is the parasitic capacitance between the BL and the node contact (CBL-NC) [1]. To reduce ... » read more

Evolution Of The EUV Ecosystem Reflected At 2023 Advanced Lithography + Patterning

By Harry Levinson - 16 Mar, 2023 - Comments: 0

As anticipated, this year’s Advanced Lithography + Patterning Symposium was a very informative event, with many interesting papers being presented across a wide range of subjects. Many papers addressed topics relevant to leading-edge lithography, which these days means EUV lithography. With EUV lithography firmly established in high volume manufacturing (HVM), we could see in the presentation... » read more

Unleashing the Potential of Compound Semiconductors: Industry Leaders Collaborate at SEMICON Taiwan 2022 to Create Ecosystem

By Ashley Huang - 16 Mar, 2023 - Comments: 0

Delivering high-speed processing over 100 times faster than silicon, compound semiconductors have made the devices a magnet for developers of leading-edge technologies out to maximize performance in key segments including automotive, data centers and communications. With the rising profile of compound semiconductors as the backdrop, leading experts gathered at the Power and Opto Semiconductor F... » read more

FPGA-based Infrastructure, With RISC-V Prototype, to Enable Implementation & Evaluation of Cross-Layer Techniques in Real HW (Best Paper Award)

By Technical Paper Link - 15 Mar, 2023 - Comments: 0

A technical paper titled "MetaSys: A Practical Open-Source Metadata Management System to Implement and Evaluate Cross-Layer Optimizations" was published by researchers at University of Toronto, ETH Zurich, and Carnegie Mellon University. This paper won the Best Paper Award at the HiPEAC 2023 conference. Abstract: "This paper introduces the first open-source FPGA-based infrastructure, MetaSy... » read more

Learning The AMS Circuit Representation From Layout Positions (UT Austin/ NVIDIA)

By Technical Paper Link - 15 Mar, 2023 - Comments: 0

A recent technical paper titled "TAG: Learning Circuit Spatial Embedding From Layouts" was published by researchers at UT Austin and NVIDIA. Abstract "Analog and mixed-signal (AMS) circuit designs still rely on human design expertise. Machine learning has been assisting circuit design automation by replacing human experience with artificial intelligence. This paper presents TAG, a new parad... » read more

Co-Design View of Cross-Bar Based Compute-In-Memory

By Technical Paper Link - 15 Mar, 2023 - Comments: 0

A new review paper titled "Compute in-Memory with Non-Volatile Elements for Neural Networks: A Review from a Co-Design Perspective" was published by researchers at Argonne National Lab, Purdue University, and Indian Institute of Technology Madras. "With an over-arching co-design viewpoint, this review assesses the use of cross-bar based CIM for neural networks, connecting the material proper... » read more

Cooling The Data Center

By Karen Heyman - 15 Mar, 2023 - Comments: 0

Since British mathematician and entrepreneur Clive Humby coined the rallying cry, “Data is the new oil,” some 20 years ago, it has been an upbeat phrase at data science conferences. But in engineering circles, that increasingly includes a daily grind of hardware challenges, and chief among them is how to cool the places where all that data is processed and stored. An estimated 65 zettaby... » read more

Creating An Enduring National Resource

By MITRE ENGENUITY - 15 Mar, 2023 - Comments: 0

The Semiconductor Alliance. It represents our efforts to convene and collaborate with industry and university members to develop input and plans for CHIPS activity that will benefit industry and Federal Government objectives. Our first paper, American Innovation, American Growth: A Vision for the National Semiconductor Technology Center, was published November 2021 to help inform and shape gov... » read more

Blog Review: March 15

By Jesse Allen - 15 Mar, 2023 - Comments: 0

Siemens EDA's Dan Yu finds that high-quality, well-connected mass data are crucial to the success of applying machine learning to verification and recommends teams pivot to a data-centric workflow. Synopsys' Shankar Krishnamoorthy suggests that deploying AI-driven chip design and verification can free teams from iterative work, letting them focus instead on product differentiation and PPA en... » read more

Deep Learning (DL) Applications In Photomask To Wafer Semiconductor Manufacturing

By eBeam Initiative - 15 Mar, 2023 - Comments: 0

Published by the eBeam Initiative Member Companies (February 2023), this list of artificial intelligence (AI) systems used by member companies in their semiconductor manufacturing products shows progress. New examples of systems using AI include: image processing and parameter tuning in lithography tool mask metrology system B-SPline Control Point generation tool sem... » read more

← Older posts Newer posts →