Low-Power IC Design Without Compromise


In the process of creating ICs, the digital implementation stage is focused on meeting the performance, power, and area (PPA) targets defined for the design. Traditionally, when talking about PPA metrics, “performance” has been the primary focus, with power and area recovered where possible, after meeting timing. But as designs have moved to smaller, more advanced process nodes, and as s... » read more

Spark On AWS Graviton2 Best Practices: K-Means Clustering Case Study


This report focuses on how to tune a Spark application to run on a cluster of instances. We define the concepts for the cluster/Spark parameters, and explain how to configure them given a specific set of resources. We use a K-Means machine learning algorithm as a case study to analyze and tune the parameters to achieve the required performance while optimally using the available resources. W... » read more

What Makes RISC-V Verification Unique?


Semiconductor Engineering sat down to discuss the verification of RISC-V processors with Pete Hardee, group director for product management at Cadence; Mike Eftimakis, vice president for strategy and ecosystem at Codasip; Simon Davidmann, founder and CEO of Imperas Software; Sven Beyer, program manager for processor verification at Siemens EDA; Kiran Vittal, senior director of alliances partner... » read more

MIPI’s Focus Widens


Ashraf Takla, president and CEO of Mixel, sat down with Semiconductor Engineering to talk about the evolution of MIPI, from mobile displays to automotive, chiplets, and how the standard is evolving to keep up with increasing data volumes. SE: There has been a lot of activity around MIPI in automotive. What's driving that? Takla: One of the early use-cases for MIPI, after Mobile has been ... » read more

Digital Twin Initiative Reaches Across The Cloud To The Edge


Digital twins are a hot topic of conversation across industries. Everyone wants a piece of this technology, without necessarily understanding how it fits into their day-to-day workflows. Today, digital twins are generally used as real-time digital models for validation and verification of a physical twin (model) of a product or system via simulation. Microsoft and Ansys are helping customers ... » read more

Hardware Virtualization Support in the RISC-V CVA6 Core


A new technical paper titled "CVA6 RISC-V Virtualization: Architecture, Microarchitecture, and Design Space Exploration" was published (preprint) by researchers at Universidade do Minho, University of Bologna, and ETH Zurich. Abstract "Virtualization is a key technology used in a wide range of applications, from cloud computing to embedded systems. Over the last few years, mainstream comp... » read more

Large Area Synthesis of 2D Material Hexagonal Boron Nitride, Improving Device Characteristics of Graphene


A new technical paper titled "Large-area synthesis and transfer of multilayer hexagonal boron nitride for enhanced graphene device arrays" was published by researchers at Kyushu University, National Institute of Advanced Industrial Science and Technology (AIST), and Osaka University. Abstract "Multilayer hexagonal boron nitride (hBN) can be used to preserve the intrinsic physical properti... » read more

A Hierarchical And Tractable Mixed-Signal Verification Methodology For First-Generation Analog AI Processors


Artificial intelligence (AI) is now the key driving force behind advances in information technology, big data and the internet of things (IoT). It is a technology that is developing at a rapid pace, particularly when it comes to the field of deep learning. Researchers are continually creating new variants of deep learning that expand the capabilities of machine learning. But building systems th... » read more

Blog Review: March 8


Synopsys' Rahul Thukral and Bhavana Chaurasia find that embedded MRAM is undergoing an uplift in utilization for low-power, advanced-node SoCs thanks to its high capacity, high density, and ability to scale to lower geometries. Siemens EDA's Chris Spear dives into the UVM Factory with a look at the  SystemVerilog Object-Oriented Programming concepts behind the factory. Cadence's Veena Pa... » read more

What’s At Stake In System Design?


What You Will Gain From This eBook: Power and Signal Integrity Insights into harmonic balancing and crosstalk analysis Learning about loop gain and transmission rates Examining the necessity of power-aware systems Electromagnetic Analysis Knowledge about the state of electromagnetics in wireless networks Insight into RADAR and LiDAR EM profiles Tips for bending, meshin... » read more

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