Advancing The Maturity Of Your Hardware Security Program


Where are you today on the Hardware Security Maturity Model? Hardware security is a journey. LEVEL 1: Foundational Define security requirements and validate hardware security features are working with functional verification. LEVEL 2: Basic Introduce threat models and security verification requirements while also enabling hardware protection mechanisms. Ad hoc security verification beg... » read more

Closing The Loop: Meeting High-Frequency Power Demands With Decoupling Capacitors


The inability to supply adequate power in time can result in intermittent board failure and hours troubleshooting in the lab. Even an IC with ample current supply can experience "power shortage" if the energy needed to transmit the data bitstream isn't available in time. Click here to read more. » read more

Startup Funding: June 2022


Big money went to manufacturing in June, with a massive round for a Chinese analog foundry’s expansion to 55 – 40nm nodes. A fab management software startup also drew sizeable investment, as did a supplier of semiconductor-grade silicon components. Investors didn’t forget chip design, with three EDA companies receiving new funding, one of which drew over $100 million. Plus, numerous te... » read more

For The Love Of Theatre And Mask-Making


Naoya Hayashi has been a friend and important contributor to the eBeam Initiative from our start over 13 years ago. We’re just one of the many interests he has embraced and championed over his 45 year career at DNP. Now it’s our turn to embrace him and thank him for the wonderful memories as he pursues his next chapter after retiring as the first research fellow from DNP this June. Aki Fuji... » read more

IMS2022 Booth Tour: EDA And Measurement Science Converge


At the IEEE MTT-S International Microwave Symposium (IMS) 2022, the theme was “Explore the Peaks of Microwave Engineering,” a play on the event’s Denver location. There’s another clever interpretation – exploring the peaks encountered in high peak-to-average power ratio (PAPR) conditions with complex modulation. These modulated signals are driving Keysight’s vision where EDA and dig... » read more

Technical Paper Round-Up: July 5


New technical papers added to Semiconductor Engineering’s library this week. [table id=36 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit for... » read more

MEMprop: Gradient-based Learning To Train Fully Memristive SNNs


New technical paper titled "Gradient-based Neuromorphic Learning on Dynamical RRAM Arrays" from IEEE researchers. Abstract "We present MEMprop, the adoption of gradient-based learning to train fully memristive spiking neural networks (MSNNs). Our approach harnesses intrinsic device dynamics to trigger naturally arising voltage spikes. These spikes emitted by memristive dynamics are anal... » read more

UC Berkeley: New Semiconductor Laser Delivering Power with Scalability


U.C. Berkeley scientists demonstrated a Berkeley Surface Emitting Lasers (BerkSELs), a long-sought breakthrough in scaling laser size with power. “Increasing both size and power of a single-mode laser has been a challenge in optics since the first laser was built in 1960,” said research team leader Boubacar Kanté, Chenming Hu Associate Professor at Berkeley. “Six decades later, we show ... » read more

TU Dresden: Tile-based Multi-Core Architecture for Heterogeneous RISC-V Processors Suitable for FPGA Platforms


New technical paper titled "AGILER: An Adaptive Heterogeneous Tile-Based Many-Core Architecture for RISC-V Processors" from researchers at Technische Universitaet Dresden (TU Dresden). Partial Abstract: "In this work, AGILER is proposed as an adaptive tile-base many-core architecture for heterogeneous RISC-V based processors. The proposed architecture consists of modular and adaptable heter... » read more

One Transistor Process-in-Memory Device Strategy w/ Multi-Functional Multi-Gate One-transistor (MGT) Design of Multiple Electrodes


New technical paper titled "Multi-functional multi-gate one-transistor process-in-memory electronics with foundry processing and footprint reduction" from researchers at Ningbo Institute of Materials Technology and Engineering (Chinese Academy of Sciences), Center of Materials Science and Optoelectronics Engineering (University of Chinese Academy of Sciences), Shanghai Institute of Microsystem ... » read more

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