Wafer Level Void-Free Molded Underfill For High-Density Fan-out Packages


In this study, experiments and mold flow simulation results are presented for a void-free wafer level molded underfill (WLMUF) process with High-Density Fan-Out (HDFO) test vehicles using a wafer-level compression molding process. The redistribution layer (RDL)-first technology was applied with 3 layers of a fine-pitch RDL structure. The test samples comprised 11.5 x 12.5-mm2 die with tall copp... » read more

Study Of Bondable Laser Release Material Using 355nm Energy To Facilitate RDL-First And Die-First Fan-Out Wafer-Level Packaging (FOWLP)


A thorough evaluation on selecting a bondable laser release material for redistribution layer (RDL)-first and die-first fan-out wafer-level packaging (FOWLP) is presented in this article. Four laser release materials were identified based on their absorption coefficient at 355 nm. In addition, all four of these materials possess thermal stability above 350 °C and pull-off adhesion on a Ti/Cu l... » read more

Blog Review: May 18


Coventor's Gerold Schropfer considers taking an approach from the early days of computing and using MEMS technology to create computers based on micro-scale electro-mechanical logic and memory for emerging low-energy computing applications such as autonomous sensor nodes and edge computing. Synopsys' Morten Christiansen explains how USB4 differs from USB 3.2, allowing simultaneous host-to-ho... » read more

Improving Atomic Force Microscopy (AFM)


Research paper "Enhancing sensitivity in atomic force microscopy for planar tip-on-chip probes" from Eindhoven University of Technology, Lorraine University and DRF/IRAMIS/SPEC-LEPO, Centre CEA de Saclay. Abstract "We present a new approach to tuning-fork-based atomic force microscopy for utilizing advanced “tip-on-chip” probes with high sensitivity and broad compatibility. Usually, s... » read more

Transforming AI Models For Accelerator Chips


AI is all about speeding up the movement and processing of data. Ali Cheraghi, solution architect at Flex Logix, talks about why floating point data needs to be converted into integer point data, how that impacts power and performance, and how different approaches in quantization play into this formula. » read more

Technical Paper Round-up: May 17


New technical papers added to Semiconductor Engineering’s library this week. [table id=27 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a go... » read more

Research Bits: May 17


Magnetic storage structures Researchers from The Ohio State University and Universidad Nacional Autonoma de Mexico investigated a new material that could potentially increase the capacity of magnetic storage devices. They identified manganese germanide, an unusual magnetic material in which the magnetism follows helices, similar to the structure of DNA. The structure gives rise to a number ... » read more

New End Markets, More Demand For Complex Chips


Experts at the Table: Semiconductor Engineering sat down to discuss economic conditions and how that affects chip design with Anirudh Devgan, president and CEO of Cadence; Joseph Sawicki, executive vice president of Siemens EDA; Niels Faché, vice president and general manager at Keysight; Simon Segars, advisor at Arm; and Aki Fujimura, chairman and CEO of D2S. This discussion was held in front... » read more

Silicon Verified ASIC Implementation for Saber


New research paper from Purdue University, KU Leuven, and Intel Labs titled "A 334uW 0.158mm2 Saber Learning with Rounding based Post-Quantum Crypto Accelerator." Abstract: "National Institute of Standard & Technology (NIST) is currently running a multi-year-long standardization procedure to select quantum-safe or post-quantum cryptographic schemes to be used in the future. Saber is the... » read more

Week in Review: Manufacturing, Test


Industry Numbers NAND flash memory is forecast to hit US $83 billion this year, an increase of 24%. DRAM is projected to hit $118 billion, up 25%, according to a recent Yole report. Both are historic records. DRAM and NAND revenues are expected to be a $260 billion market in 2027 (combined), with advanced technologies such as EUV lithography, hybrid bonding and 3D DRAM driving this. SEMI in... » read more

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