X-ray Imaging of Silicon Die Within Fully Packaged Semiconductor Devices
By Technical Paper Link - 21 Jan, 2022 - Comments: 0

Abstract: "X-ray diffraction imaging (XRDI) (topography) measurements of silicon die warpage within fully packaged commercial quad-flat no-lead devices are described. Using synchrotron radiation, it has been shown that the tilt of the lattice planes in the Analog Devices AD9253 die initially falls, but after 100 °C, it rises again. The twist across the die wafer falls linearly with an incre... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 21 Jan, 2022 - Comments: 0

Fabs Intel has announced plans for an initial investment of more than $20 billion in the construction of two new leading-edge fabs in Ohio. Planning for the first two factories will start immediately, with construction expected to begin late in 2022. Production is expected to come online in 2025. As part of the announcement, Air Products, Applied Materials, Lam Research and Ultra Clean Technol... » read more

Week In Review: Design, Low Power
By Jesse Allen - 21 Jan, 2022 - Comments: 0

Tools & design EDA industry revenue increased 7.1% year-over-year from $2.95 billion to $3.46 billion in Q3 2021, according to the ESD Alliance. "Geographically, all regions reported double-digit growth, with product categories CAE, Printed Circuit Board and Multi-Chip Module, SIP, and Services also showing double-digit growth," said Walden C. Rhines, Executive Sponsor of the SEMI Electron... » read more

Week In Review: Auto, Security, Pervasive Computing
By SE Staff - 21 Jan, 2022 - Comments: 0

Security Arm shipped a prototype CHERI-enabled Morello processor, SoC, and board, the first products coming from the security Morello research program that aims to make more secure hardware that will block certain common attacks. The first board prototypes are going to testing teams at Google, Microsoft, and other major stakeholders and partners across the industry and academia.  The UKRI (UK... » read more

Screen Printed Chipless RFID Tags on Packaging Substrates
By Technical Paper Link - 20 Jan, 2022 - Comments: 0

Abstract: "A chipless radio frequency identification (RFID) tag is a suitable low-cost alternative to any chip-based RFID one. The flexibility to use low-cost printing techniques makes chipless RFID a competitive technology. In this paper, we report an evaluation of the microwave performance of two different screen-printed chipless tags in the 3–6 GHz range. The tags were designed and scre... » read more

Mixed Outlook For Silicon Wafers
By Mark LaPedus - 20 Jan, 2022 - Comments: 0

Silicon wafers are a fundamental part of the semiconductor business. Every chipmaker needs to buy them in one size or another, such as 200mm, 300mm and others. Silicon wafer vendors produce and sell bare or raw silicon wafers to chipmakers, who in turn process them into chips. So what’s in store for the silicon wafer market? Sungho Yoon, senior research manager at SEMI, sat down with Se... » read more

Thin Quad Die Package (QDP) Development
By Shaun Bowers - 20 Jan, 2022 - Comments: 0

In the world of solid-state memory fabs, bits per mm2 rule. In the memory packaging market, mm2 of silicon per a given package thickness is the defining feature. Both the memory architecture of the wafer and the package technology take advantage of 3D structures to achieve best in class bit density. In the case of the wafer fab, 3D NAND and other technologies are pushing the envelope to meet ev... » read more

200mm Shortages May Persist For Years
By Mark LaPedus - 20 Jan, 2022 - Comments: 2

A surge in demand for chips at more mature process nodes is causing shortages for both 200mm foundry capacity and 200mm equipment, and it shows no signs of letting up. In fact, even with new capacity coming on line this year, shortages are likely to persist for years, driving up prices and forcing significant changes across the semiconductor supply chain. Shortages for both 200mm foundry cap... » read more

The Effect Of Pattern Loading On BEOL Yield And Reliability During Chemical Mechanical Planarization
By Taeyeon Oh - 20 Jan, 2022 - Comments: 0

Chemical mechanical planarization (CMP) is required during semiconductor processing of many memory and logic devices. CMP is used to create planar surfaces and achieve uniform layer thickness during semiconductor manufacturing, and to optimize the device topology prior to the next processing step. Unfortunately, the surface of a semiconductor device is not uniform after CMP, due to different re... » read more

Luminaries See Growth Opportunities For Photomask Writers
By Jan Willis - 20 Jan, 2022 - Comments: 0

Multi-beam mask writers (MBMWs) are the new kid on the block of the photomask writers, so growth predictions aren’t surprising. In fact, 90% of the industry luminaries surveyed by the eBeam Initiative think that new MBMW purchases will increase over the next three years, as shown in figure 1. Looking at that chart, industry luminaries predict sales of new photomask writers to increase across ... » read more

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