Massive IoT Interop Fuels Protocol Battle
By Bryon Moyer - 15 Jul, 2021 - Comments: 0

Wireless standards are plentiful, but most are not capable of being scaled to the level of a smart city. As a result, such networks have been built application-by-application using proprietary stacks, often with non-interoperable network layers. That, in turn, has slowed the proliferation of dense wireless connectivity at scale. “In a hyper-connected world, connectivity choices are driv... » read more

Accelerating 5G Baseband With Adaptive SoCs
By Awanish Verma - 15 Jul, 2021 - Comments: 0

5G new radio (NR) network specifications demand new architectures for radio and access networks. While the 5G NR architecture includes new spectrum and massive MIMO (mMIMO) antennas, corresponding access networks architecture must also evolve to implement the services defined by 5G, which include enhanced Mobile Broadband, Ultra Reliable Low Latency Communications and massive Machine Type Commu... » read more

Automotive Innovations In Semiconductors
By Jeff Barnum - 15 Jul, 2021 - Comments: 0

By Jeff Barnum, Janay Camp, and Cathy Perry Sullivan The semiconductor industry performed better than expected in 2020 despite the impact of COVID-19 on the global economy and is preparing for accelerated growth in 2021 and beyond. The global coronavirus pandemic significantly increased demand for communications electronics and fueled the growth in cloud computing to support remote work and ... » read more

Design For Test Data
By Ed Sperling - 14 Jul, 2021 - Comments: 0

As design pushes deeper into data-driven architectures, so does test. Geir Eide, director for product management of DFT and Tessent Silicon Lifecycle Solutions at Siemens Digital Industries Software, talks with Semiconductor Engineering about a subtle but significant shift for designing testability into chips so that test data can be used at multiple stages during a device’s lifetime. » read more

Blog Review: July 14
By Jesse Allen - 14 Jul, 2021 - Comments: 0

Siemens EDA's Wei-Lii Tan considers the tradeoffs when running library characterization in the cloud and how to think about running CPUs in parallel, the cost of throughput, and runtime reductions. A Synopsys writer checks out the reduced blanking feature in HDMI 2.1, which can help reduce the transmission rate while keeping the resolution and refresh rate intact for higher resolution displa... » read more

CEO Outlook: Chiplets, Longer IC Lifetimes, More End Markets
By Ed Sperling - 14 Jul, 2021 - Comments: 1

Experts at the Table: Semiconductor Engineering sat down to discuss chiplets, longer IC lifetimes, and a spike in the number of end applications with Lip-Bu Tan, CEO of Cadence; Simon Segars, CEO of Arm; Joseph Sawicki, executive vice president of Siemens IC EDA; John Kibarian, CEO of PDF Solutions; Prakash Narain, president and CEO of Real Intent; Dean Drako, president and CEO of IC Manage; an... » read more

Manufacturing Bits: July 13
By Mark LaPedus - 13 Jul, 2021 - Comments: 0

Heterogenous III-V packaging At the recent 2021 IEEE 71st Electronic Components and Technology Conference (ECTC), a group presented a paper on the development of a wafer-level fan-out package using heterogenous III-V devices. This paper deals with the packaging of two III-V chips for use in RF transceiver applications in base stations. III-V Lab, CEA-Leti, Thales and United Monolithic Semic... » read more

Power/Performance Bits: July 13
By Jesse Allen - 13 Jul, 2021 - Comments: 0

Graphene PUFs Researchers at Pennsylvania State University propose using graphene to create physically unclonable functions (PUFs) that are energy efficient, scalable, and secure against AI attacks. The team first fabricated nearly 2,000 identical graphene transistors. Despite their structural similarity, the transistors' electrical conductivity varied due to the inherent randomness arising... » read more

Dynamically Reconfiguring Logic
By Ed Sperling - 12 Jul, 2021 - Comments: 0

Dynamic reconfiguration of semiconductor logic has been possible for years, but it never caught on commercially. Cheng Wang, co-founder and senior vice president of software and engineering at Flex Logix, explains why this capability has been so difficult to utilize, what’s changed, how a soft logic layer can be used to control when to read, compute, steer, and write data back to memory, and ... » read more

Chipmakers Getting Serious About Integrated Photonics
By Brian Bailey - 12 Jul, 2021 - Comments: 3

Integrating photonics into semiconductors is gaining traction, particularly in heterogeneous multi-die packages, as chipmakers search for new ways to overcome power limitations and deal with increasing volumes of data. Power has been a growing concern since the end of Dennard scaling, which happened somewhere around the 90nm node. There are more transistors per mm², and the wires are thinne... » read more

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