A Novel PUF Using Stochastic Short-Term Memory Time of Oxide-Based RRAM for Embedded Applications


Abstract: "RRAM suffers from poor retention with short-term memory time when using low compliance current for programing. However, the short-term memory time exhibits ideal randomness, which can be exploited as an entropy source for physically unclonable function (PUF). In this work, we demonstrated a novel PUF utilizing the stochastic short-term memory time of oxide-based RRAM. The proposed P... » read more

Hybrid Boolean Networks as Physically Unclonable Functions


Abstract: "We introduce a Physically Unclonable Function (PUF) based on an ultra-fast chaotic network known as a Hybrid Boolean Network (HBN) implemented on a field programmable gate array. The network, consisting of N coupled asynchronous logic gates displaying dynamics on the sub-nanosecond time scale, acts as a `digital fingerprint' by amplifying small manufacturing variations during a peri... » read more

A Novel Complementary Architecture of One-time-programmable Memory and Its Applications as Physical Unclonable Function (PUF) and One-time Password


Abstract "For the first time, we proposed a 2T complementary architecture of one-time-programmable memory (OTP) in a foundry logic CMOS chip. It was then used to realize the PUF (Physical unclonable function), and the combination with the AI technology to provide a one-time password capability. At first, an OTP was developed based on a novel 2T CMOS unit cell. The experimental results show t... » read more

Recent Advances in Thermal Metamaterials and Their Future Applications for Electronics Packaging


Abstract: "Thermal metamaterials exhibit thermal properties that do not exist in nature but can be rationally designed to offer unique capabilities of controlling heat transfer. Recent advances have demonstrated successful manipulation of conductive heat transfer and led to novel heat guiding structures such as thermal cloaks, concentrators, etc. These advances imply new opportunities to gui... » read more

Network Interface Card Evolution


Longer chip lifetimes, more data to process and move, and a slowdown in the rate of processor improvements has created a series of constantly shifting bottlenecks. Kartik Srinivasan, director of data center marketing at Xilinx, looks at one of those bottlenecks, the network interface card, why continuous enhancements and changes will be required, and how to extend the life of NICs as the networ... » read more

Systematic Methodology To Solve Reset Challenges In Automotive SoCs


Modern automotive SoCs typically contain multiple asynchronous reset signals to ensure systematic functional recovery from unexpected situations and faults. This complex reset architecture leads to a new set of problems such as possible reset domain crossing (RDC) issues. The conventional clock domain and CDC verification methodologies cannot identify such critical bugs. In this paper, we prese... » read more

Xilinx AI Engines And Their Applications


This white paper explores the architecture, applications, and benefits of using Xilinx's new AI Engine for compute intensive applications like 5G cellular and machine learning DNN/CNN. 5G requires between five to 10 times higher compute density when compared with prior generations; AI Engines have been optimized for DSP, meeting both the throughput and compute requirements to deliver the hig... » read more

mmWave Chip, Package, And Board Beamforming Solutions


RF front-end architectures grow more complex with each generation of communication systems. To accommodate these architectures, more densification and miniaturization is taking place with electronic systems implemented through innovations in system-in-package (SiP) design. 5G data rates exceeding 1GB/s will be supported by the available bandwidth in the millimeter-wave (mmWave) spectrum and ... » read more

How Heterogeneous ICs Are Reshaping Design Teams


Experts at the Table: Semiconductor Engineering sat down to discuss the complex interactions developing between different engineering groups as designs become more heterogeneous, with Jean-Marie Brunet, senior director for the Emulation Division at Siemens EDA; Frank Schirrmeister, senior group director for solution marketing at Cadence; Maurizio Griva, R&D Manager at Reply; and Laurent Mai... » read more

CISO’s Guide To Sensitive Data Protection


Emerging data protection and privacy laws are causing organizations to scramble to implement strategies that address regulatory compliance and data security governance. And the SolarWinds software supply chain attack, in which attackers inserted a malicious back door into its network software release that later led to sensitive data exposure, further underscores the need to secure the DevSecOps... » read more

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