Standardization Of HDMs For Hierarchical CDC And RDC Analysis
By Siemens EDA - 11 Nov, 2025 - Comments: 0

Currently hierarchical data models (HDM) must be generated with the same EDA tool that customers will use to consume the HDM for CDC and RDC analysis at the SoC level. To resolve this problem a CDC Working Group was created within the Accellera organization. The goal of this Working Group is to create a standard format for HDMs so the models can be consumed by any EDA tool irrespective of the s... » read more

Thermal Sensing Headache Finally Over For 2nm And Beyond
By Nir Sever - 11 Nov, 2025 - Comments: 0

Effective thermal management is crucial to prevent overheating and optimize performance in modern SoCs. Inadequate temperature control due to inaccurate thermal sensing compromises power management, reliability, processing speed, and lifespan, leading to issues like electromigration, hot carrier injection, and even thermal runaway. Unfortunately, precise thermal monitoring reached an inflect... » read more

HBM Leads The Way To Defect-Free Bumps
By Laura Peters - 11 Nov, 2025 - Comments: 0

High-bandwidth memory stands at the forefront of multiple technology developments as a critical enabler of AI, but it is one of the most difficult modules to manufacture. Leading HBM device makers and foundries must simultaneously handle multi-layer chip stacking, die warpage, and shorter product lifecycles that are shrinking from two years down to just one. But perhaps the most formidable c... » read more

Designing for Reliability, Availability, and Serviceability Across the System Lifecycle
By Synopsys - 11 Nov, 2025 - Comments: 0

Discover how embedding advanced monitoring and analytics directly into silicon is redefining system management across the entire lifecycle. This white paper examines the evolving role of reliability, availability, and serviceability (RAS) in modern electronic systems, highlighting why proactive resilience has become just as critical as raw performance. It explores strategies for reducing costly... » read more

Solving Today’s Toughest Test Challenges: A New Era Of Engineering Productivity
By Ed Seng - 11 Nov, 2025 - Comments: 0

Today’s test engineers face unprecedented demands as semiconductor designs grow more complex and product cycles accelerate. Advanced packaging, chiplet architectures, and AI accelerators are reshaping the landscape, yet engineering resources remain fixed. Traditional approaches to scaling productivity by adding headcount no longer apply. While cost of test is always a consideration, ensuri... » read more

Silicon Photonic Interconnected Chiplets With Computational Network And IMC For LLM Inference Acceleration (NUS)
By Technical Paper Link - 10 Nov, 2025 - Comments: 0

A new technical paper titled "PICNIC: Silicon Photonic Interconnected Chiplets with Computational Network and In-memory Computing for LLM Inference Acceleration" was published by researchers at the National University of Singapore. Abstract "This paper presents a 3D-stacked chiplets based large language model (LLM) inference accelerator, consisting of non-volatile in-memory-computing proces... » read more

Free-Space Gated Transistor In Wide Bandgap And Ultra Wide Bandgap Semiconductors (KAUST Et Al.)
By Technical Paper Link - 10 Nov, 2025 - Comments: 0

A new technical paper titled "Lateral Semiconductor–Free-Space Gate Transistors" was published by researchers at KAUST and the Indian Institute of Technology. Abstract "We introduce a novel lateral transistor architecture, the semiconductor−free-space gate transistor (SFGT), in which the conventional solid dielectric is replaced by a semiconductor−free-space gate configuration with su... » read more

China GenAI: Who Will Fill The Vacuum?
By Geoff Tate - 10 Nov, 2025 - Comments: 1

China and the U.S.A are locked in a titanic battle over tariffs. The U.S. makes the world’s best AI Accelerators: Nvidia, AMD, Google, AWS …among others. But the U.S. worries China could deploy these for military purposes, so it imposed strict export controls that resulted in China getting the second-best AI accelerators. These export controls have been further tightened as part of tarif... » read more

Research Bits: Nov. 10
By Jesse Allen - 10 Nov, 2025 - Comments: 0

Post-doping plasma for DRAM capacitors Researchers from Ulsan National Institute of Science and Technology (UNIST), Pohang University of Science and Technology (POSTECH), and Seoul National University of Science and Technology developed a post-doping plasma (PDP) process to improve the performance of DRAM capacitors. Aluminum-doped titanium dioxide (Al-doped TiO2) is a promising material fo... » read more

Chip Industry Technical Paper Roundup: Nov. 10
By Emma Riverso - 10 Nov, 2025 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=490 /] Find more semiconductor research papers here. » read more

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