The Sub-2nm Paradox
Reducing variation in manufacturing, monitoring behavior over time, and targeting specific workloads can have a big impact on power, performance, and area/cost.
Chip Industry Week In Review
Computex shows AI ecosystem; fully autonomous chip design; Intel targets AI racks; Nikon's 1.5 micron L/S litho; IC market rises; Apple's chiplet era; 4,500 chips per AI server rack; HBM price hikes; quantum IPO, chip and roadmap; SiC guidelines; MXenes; EV outlook; autonomous edge chiplets.
Chip Industry Week In Review
AI panel-level packaging innovations at ECTC; cool HBM; 2nm EDA tools; side-channel attacks in 2.5/3D; Huawei claims; IC talent initiative; glass core substrates; memory test facility; Taiwan investments; SiC teamup; DRAM sizing; sequentially stacking silicon; MIPI A-PHY SerDes automotive compliance.
Chip Industry Week In Review
Apple-Intel is on, says Trump; Amkor's big win; Intel 18A-P; Amazon to sell its AI chips; Rambus' automotive RoT; Brewer's buy; VLSI Symposium tech; CHIPS Act funding; MIT sensor; RISC-V CPU fuzzing.
Agentic AI Is Changing Data Center Architectures
Standalone GPUs are being replaced by heterogeneous SoCs and chiplets that combine CPUs, GPUs, and NPUs to eliminate memory bottlenecks, reduce latency, and boost efficiency.
Advanced Packaging Limits Come Into Focus
Mechanical and process control limits are now shaping what can be manufactured at scale.
Startup Funding: Q1 2026
Massive rounds for AI, EDA, and manufacturing; 80 startups raise $8.4B.
All AI Data Center Interconnects Will Be Optical Within 5 Years
InP and SiPho join CMOS as critical technologies. Lasers, CPO and OCS will be everywhere (indium phosphide, silicon photonics, co-packaged optics, optical circuit switch).
Making Hybrid Bonding Better
Why this technology is so essential for multi-die assemblies, and how it can be improved.
When Semiconductor Materials Misbehave
The gap between lab performance and fab reality is growing wider as packages grow more complex.
The Sub-2nm Paradox
Reducing variation in manufacturing, monitoring behavior over time, and targeting specific workloads can have a big impact on power, performance, and area/cost.
TSMC Tech Symposium 2026, By The Numbers
Foundry rolls out aggressive new roadmap, focusing on area, power, and latency.
CPO Is Extending The Limits Of What’s Possible In AI Data Centers
Co-packaged optics technology will have a big impact on system power and the cost of data movement.
