Why Scaling Must Continue


The entire semiconductor industry has come to the realization that the economics of scaling logic are gone. By any metric—price per transistor, price per watt, price per unit area of silicon—the economics are no longer in the plus column. So why continue? The answer is more complicated than it first appears. This isn't just about inertia and continuing to miniaturize what was proven in t... » read more

Outlook For Masks, Materials and Wafers


After a slowdown in the first half of 2019, chipmakers and equipment vendors face a cloudy outlook for the second half of this year, with a possible recovery in 2020. But what about other key technologies like materials, photomasks and silicon wafers? These are also critical for the semiconductor supply chain and are key indicators where the market is heading. In the first half of 2019, m... » read more

Advanced Patterning Techniques For 3D NAND Devices


By Yu De Chen and Jacky Huang Driven by Moore’s law, memory and logic semiconductor manufacturers pursue higher transistor density to improve product cost and performance [1]. In NAND Flash technologies, this has led to the market dominance of 3D structures instead of 2D planar devices. Device density can be linearly increased by increasing stack layer counts in a 3D NAND device [2]. At th... » read more

Silicon Carbide’s Superpowers


As we enter a new computing era driven by the Internet of Things (IoT), Big Data and Artificial Intelligence (AI), demand is growing for more energy-efficient chips. In this context, we usually think about Moore’s Law and reducing the size of transistors. However, advances in power semiconductors are not governed by node size reduction. Silicon power switches, such as MOSFETs and IGBTs, ar... » read more

GaN Versus Silicon For 5G


The global race to launch 5G mmWave frequencies could provide a long-anticipated market opportunity for gallium nitride (GaN) as an alternative to silicon. GaN is more power-efficient than silicon for 5G RF. In fact, GaN has been the heir apparent to silicon in 5G power amplifiers for years, especially when it comes to mmWave 5G networks. What makes it so attractive is its ability to efficie... » read more

Breaking The AI Memory Bottleneck


In the long unfolding arc of technology innovation, artificial intelligence (AI) looms as immense. In its quest to mimic human behavior, the technology touches energy, agriculture, manufacturing, logistics, healthcare, construction, transportation and nearly every other imaginable industry – a defining role that promises to fast track the fourth Industrial Revolution. And if the industry orac... » read more

The Next New Memories


Several next-generation memory types are ramping up after years of R&D, but there are still more new memories in the research pipeline. Today, several next-generation memories, such as MRAM, phase-change memory (PCM) and ReRAM, are shipping to one degree or another. Some of the next new memories are extensions of these technologies. Others are based on entirely new technologies or involve ar... » read more

Manufacturing Printed Sensors


Vijaya Kayastha, lead device development engineer at Brewer Sciences, talks about the different approaches for different printed sensors, why each of those requires different skill levels for scaling up the process, and why this technology will be so important for industrial and IoT applications. » read more

Wanted: More Fab Tool Part Standards


As chipmakers ramp up the next wave of processes and grapple with how to reduce defect levels, they are encountering problems from an unlikely source—components inside of the fab equipment. Defects are unwanted deviations in chips, which impact yields and device performance. Typically, they are caused by an unforeseen glitch during the process flow. But a lesser-known problem involves defe... » read more

Intra-Field Stress Impact on Global Wafer Deformation


One of the contributors to layer-to-layer overlay in today’s chip manufacturing process is wafer distortion due to thin film deposition. Mismatch in the film specific material parameters (e.g., thermal expansion coefficients) may result in process-induced warpage of the wafers at room temperature. When these warped wafers are loaded onto the scanner for the next layer exposure, in-plane disto... » read more

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