category: Test, Measurement and Analytics

category: IoT, Security & Automotive

Addressing High Precision Automated Optical Inspection Challenges With Unique 3D Technology Solution
By CyberOptics - 07 Sep, 2021 - Comments: 0

Driven by the continued decrease in the size of electronics packaging, combined with the increase in density, there is a critical need for highly accurate 3D inspection for defect detection. Using multi-view 3D sensors and parallel projection, it is possible to capture more of the board at a faster rate as compared to serial image acquisition, which is more time consuming. Precise 3D image r... » read more

Fabs Drive Deeper Into Machine Learning
By Anne Meixner - 07 Sep, 2021 - Comments: 0

Advanced machine learning is beginning to make inroads into yield enhancement methodology as fabs and equipment makers seek to identify defectivity patterns in wafer images with greater accuracy and speed. Each month a wafer fabrication factory produces tens of millions of wafer-level images from inspection, metrology, and test. Engineers must analyze that data to improve yield and to reject... » read more

Making Test Transparent With Better Data
By Susan Rambo - 07 Sep, 2021 - Comments: 0

Data is critical for a variety of processes inside the fab. The challenge is getting enough consistent data from different equipment and then plugging it back into the design, manufacturing, and test flows to quickly improve the process and uncover hard-to-find defective die. Progress is being made. The inspection and test industry is on the cusp of having more dynamic ways to access the dat... » read more

Automotive: Innovations, Trends And The Intersection With Semiconductors
By KLA - 07 Sep, 2021 - Comments: 0

The semiconductor industry performed better than expected in 2020 despite the impact of COVID-19 on the global economy and is preparing for accelerated growth in 2021 and beyond. The global coronavirus pandemic significantly increased demand for communications electronics and fueled the growth in cloud computing to support remote work and learning. Semiconductor manufacturers, many running at p... » read more

Designing Chips For Test Data
By Ed Sperling - 10 Aug, 2021 - Comments: 0

Collecting data to determine the health of a chip throughout its lifecycle is becoming necessary as chips are used in more critical applications, but being able to access that data isn't always so simple. It requires moving signals through a complex, sometimes unpredictable, and often hostile environment, which is a daunting challenge under the best of conditions. There is a growing sense of... » read more

Harness System-Level Data To Optimize Many-Core AI And ML Chips
By Siemens EDA - 10 Aug, 2021 - Comments: 0

The novel multicore architectures of SoCs for machine learning (ML) and artificial intelligence (AI) applications are expected to deliver huge improvements in power efficiency. However, chip development teams and the customers for their devices face the growing complexity of hardware-software co-optimization, validation, and debug. In short, these SoCs are increasingly difficult to validate and... » read more

Power-Aware Test: Addressing Power Challenges In DFT And Test
By Rahul Singhal - 10 Aug, 2021 - Comments: 0

Integrated circuit (IC) sizes continue to grow as they meet the compute requirements of cutting-edge applications such as artificial intelligence (AI), autonomous driving, and data centers. As design sizes increase, the total power consumption of the chip also increases. While process node scaling reduces a transistor’s size and its operating-voltage, power scaling has not kept up with the si... » read more

Reducing Rework In CMP: An Enhanced Machine Learning-Based Hybrid Metrology Approach
By Vamsi Velidandla - 10 Aug, 2021 - Comments: 0

By Vamsi Velidandla, John Hauck, Zhuo Chen, Joshua Frederick, and Zhihui Jiao The semiconductor industry is constantly marching toward thinner films and complex geometries with smaller dimensions, as well as newer materials. The number of chemical mechanical planarization (CMP) steps has increased and, with it, a greater need for within-wafer uniformity and wafer-to-wafer control of the thin... » read more

Why Wafer Bumps Are Suddenly So Important
By Anne Meixner - 10 Aug, 2021 - Comments: 2

Wafer bumps need to be uniform in height to facilitate subsequent manufacturing steps, but a push for 100% inspection in packaging in mission-critical markets is putting a strain on existing measurement technologies. Bump co-planarity is essentially a measure of flatness. Specifically, it measures the variation in bump height, which may have a target, for example, of about 100 microns. As a ... » read more

Better Optimization For Many-Core AI Chips
By Richard Oxland - 10 Aug, 2021 - Comments: 0

The rise of massively parallel computing has led to an explosion of silicon complexity, driven by the need to process data for artificial intelligence (AI) and machine learning (ML) applications. This complexity is seen in designs like the Cerebras Wafer Scale Engine (figure 1), a tiled manycore, multiple wafer die with a transistor count into the trillions and nearly a million compute cores. ... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy