2023: A Good Year For Semiconductors

By Brian Bailey - 21 Dec, 2023 - Comments: 0

Looking back, 2023 has had more than its fair share of surprises, but who were the winners and losers? The good news is that by the end of the year, almost everyone was happy. That is not how we exited 2022, where there was overcapacity, inventories had built up in many parts of the industry, and few sectors — apart from data centers — were seeing much growth. The supposed new leaders we... » read more

Balancing Memory And Coherence: Navigating Modern Chip Architectures

By Frank Schirrmeister - 21 Dec, 2023 - Comments: 0

In the intricate world of modern chip architectures, the "memory wall" – the limitations posed by external DRAM accesses on performance and power consumption growing slower than the ability to compute data – has emerged as a pivotal challenge. Architects must strike a delicate balance between leveraging local data reuse and managing external memory accesses. While caches are critical for op... » read more

Shedding More Light On Photonics For Multi-Die Systems

By Kenneth Larsen - 21 Dec, 2023 - Comments: 0

By Kenneth Larsen and Twan Korthorst Photonics harness the speed of light for fast, low-power, high-capacity data transfer. A tremendous amount of data needs to be moved swiftly across different components in a multi-die system. Considering this, exploiting the advantages of light is one way to mitigate heat dissipation and energy consumption concerns while delivering fast data transmission.... » read more

Extending DTCO For Today’s Competitive IC Landscape

By Le Hong - 21 Dec, 2023 - Comments: 0

As semiconductor components continue to shrink, the challenges associated with design-for-manufacturing (DFM) and design-technology co-optimization (DTCO) increase. The complexity of the IC design and manufacturing process demands an extension of traditional DFM and DTCO techniques to overcome the systematic failures tied to complex design-process interactions. Designers need to accelerate d... » read more

Unraveling PCIe 6.0 Loopback And Digital Near-End Loopback Feature

By Sabnam Sahoo - 21 Dec, 2023 - Comments: 0

The PCIe specification has given a specific Link Training and Status State Machine (LTSSM) state named Loopback, which is intended for test and fault isolation use. Basically, it gives a mechanism that involves looping back the data that was received in the Loopback LTSSM state. The entry and exit behavior are specified, and all other details are implementation-specific. Loopback can op... » read more

Field Testing In 5G NR

By Keysight - 21 Dec, 2023 - Comments: 0

5G NR network coverage measurements will be beam-based instead of cell-based. This will change the methodology of coverage KPI calculation. The amount of reference signals in the air is increasing as there will be multiple reference beams per cell, posing more stringent performance requirements for scanning receivers and test UEs. Both test UEs and scanners will be needed for 5G NR field verifi... » read more

Shattered Silos: 2024’s Top Technology Trends

By Jenn Mullen - 21 Dec, 2023 - Comments: 2

Technological innovation is increasingly focused on solving pressing, global challenges like climate change, disaster response, and accessible, preventative healthcare. Time is of the essence in finding solutions to these issues. On the global stage, the deadline for the United Nations (UN) 2030 Agenda for Sustainable Development, a framework of strategies to tackle climate change, improve heal... » read more

Densification Of RF Designs

By Ann Mutschler - 20 Dec, 2023 - Comments: 0

It’s challenging enough to deal with wireless signals at the 5G and 6G frequencies. But with increased density in chips crammed into smaller packages, higher power, beam forming, and MIMO, design requirements are very different than in the past. Simple parasitic extraction no longer is sufficient. Daren McClearnon, product manager for RF and microwave simulation at Keysight, talks about the n... » read more

System-Driven PPA For Multi-Chiplet Designs

By Cadence - 20 Dec, 2023 - Comments: 0

As we approach the device scaling limitations at advanced nodes, the demand on compute performance and data transfer for hyperscale data center and AI designs is at an all-time high. Advanced systems-on-chip (SoCs) are reaching reticle size limits, and there has been a need to find innovative solutions to continue Moore’s law scaling and achieve performance improvements with reduced power. St... » read more

Accelerated Optimization With IC Compiler II

By Synopsys - 20 Dec, 2023 - Comments: 0

Efficient optimization is a necessary, yet challenging aspect of the physical implementation flow. IC Compiler II and the underlying physical optimization engines have been re-thought and re-architected to address these growing challenges. Click here to read more. » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.