category: System-Level Design

category: Auto, Security & Edge AI

Accellera Updates UVM Standard
By Ed Sperling - 01 Jul, 2014 - Comments: 2

Accellera uncorked its backward-compatible UVM 1.2 standard, which fixes dozens of bugs, including sequences for run-time phasing and support for multithreading. “We’ve solved more than a dozen incompatibilities and improved overall productivity,” said Intel’s Thomas Alsop, who serves as co-chair of the UVM (Universal Verification Methodology) working group. “This is a major releas... » read more

System Bits: July 1
By Ann Mutschler - 01 Jul, 2014 - Comments: 0

In the quest to build gadgets that can survive the abuse, engineers have been testing electronic systems based on new materials that are both flexible and switchable – that is, capable of toggling between two electrical states: on-off, one-zero, the binary commands that can program all things digital. At the same time, three Stanford researchers believe that they’ve discovered just such ... » read more

Does IoT Change Design?
By Neil Hand - 27 Jun, 2014 - Comments: 0

Over the past few months, and especially at DAC, I have been struck by the amount of interest in IoT and its impact on semiconductor design. In this post I will look at how IoT impacts the life of system designers — and explore if it really changes anything. Important source of semiconductor growth IoT is clearly important to investors, semiconductor makers, IP and EDA because it expands ... » read more

The Week In Review: Design
By Ed Sperling - 27 Jun, 2014 - Comments: 0

Tools eSilicon uncorked a GDSII online quote system for TSMC, which allows chipmakers to pick a variety of information ranging from process technology to package to yield and tapeout and production forecast and get a quote within minutes. This is a new twist in the value chain provider market. Synopsys added program to speed up FPGA-based prototype creation, which includes approved third-pa... » read more

Everyone Is A Programmer
By Ed Sperling - 26 Jun, 2014 - Comments: 0

There was a time when so many people didn’t know how to program their VCRs that OEMs stopped adding clocks because it was embarrassing to have them constantly blinking “12:00.” We’ve come a long way since VCRs. And that means all of us. While engineers have always enjoyed tinkering with technology, what’s changed is that everyone tinkers with technology now. Everyone programs phone... » read more

Moore’s Law Tail No Longer Wagging The Dog
By Brian Bailey - 26 Jun, 2014 - Comments: 3

In a recent special report titled “Will 7nm and 5nm really happen?” Semiconductor Engineering outlined the progress being made for new production nodes and the progress being made to overcome the technological challenges that they contain. But who are the likely candidates for those new nodes and who is going to pay for their development, including the EDA tools that will be necessary to ut... » read more

Asynchronous Is Mostly Academic
By Ann Mutschler - 26 Jun, 2014 - Comments: 4

There are a number of interesting technologies to keep an eye on in term of how and when they could be adopted for use in SoC design today, some of which include gallium arsenide, GPGPUs, 3D ICs and asynchronous logic. Asynchronous logic promises a number of benefits in some specific application areas, and one that buoys to the surface for potential near-term use is in the area of security a... » read more

Can EDA Keep Growing?
By Ed Sperling - 26 Jun, 2014 - Comments: 0

Slower progress at the leading edge of process technology, coupled with rising costs and fewer design starts, are changing the economics of the EDA world. Not surprisingly, there is almost a direct correlation between the shrinking number of startups in the field and the number of customers working on the most advanced nodes. So what exactly does this mean for the EDA world? Big changes, for... » read more

Where Do We Stand With CDC?
By Ann Mutschler - 26 Jun, 2014 - Comments: 1

Semiconductor Engineering sat down to discuss where the industry stands on clock domain crossing with Charlie Janac, CEO of Arteris; Shaker Sarwary, VP of Formal Verification Products at Atrenta; Pranav Ashar, CTO at Real Intent; and Namit Gupta, CAE, Verification Group at Synopsys. What follows are excerpts of that conversation. SE: While not a new aspect of design, clock domain crossing is... » read more

Linux And The Big Bad Wolf
By Achim Nohl - 26 Jun, 2014 - Comments: 0

With great interest, I am following any news around the progress of Linaro and the Linux kernel community with regard to addressing all the requirements for an ARMv8 64-bit server software stack. Well-established standards, such as the Unified Extensible Firmware Interface (UEFI) and Advanced Configuration and Power Interface (ACPI), are impacting the development direction of the community b... » read more

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