GaN Devices: Properties and Performance At Extremely High Temperatures


A new technical paper titled "High temperature stability of regrown and alloyed Ohmic contacts to AlGaN/GaN heterostructure up to 500 °C" was published by researchers at MIT, Technology Innovation Institute, Ohio State University, Rice University and Bangladesh University of Engineering and Technology. Abstract "This Letter reports the stability of regrown and alloyed Ohmic contacts to A... » read more

Scheduling Multi-Model AI Workloads On Heterogeneous MCM Accelerators (UC Irvine)


A technical paper titled “SCAR: Scheduling Multi-Model AI Workloads on Heterogeneous Multi-Chiplet Module Accelerators” was published by researchers at University of California Irvine. Abstract: "Emerging multi-model workloads with heavy models like recent large language models significantly increased the compute and memory demands on hardware. To address such increasing demands, designin... » read more

Memory System Benchmarking, Simulation, And Application Profiling Via A Memory Stress Framework


A technical paper titled “A Mess of Memory System Benchmarking, Simulation and Application Profiling” was published by researchers at Barcelona Supercomputing Center, Unversitat Politecnica de Catalunya, and Micron Technology (Italy). Abstract: "The Memory stress (Mess) framework provides a unified view of the memory system benchmarking, simulation and application profiling. The Mess benc... » read more

Compilation Challenges Of Scaling Up Quantum Computing With Superconducting Chiplet Architecture


A technical paper titled “MECH: Multi-Entry Communication Highway for Superconducting Quantum Chiplets” was published by researchers at University of California San Diego, University of California Santa Barbara, and Cisco Quantum Lab. Abstract: "Chiplet architecture is an emerging architecture for quantum computing that could significantly increase qubit resources with its great scalabili... » read more

A HW-Aware Scalable Exact-Attention Execution Mechanism For GPUs (Microsoft)


A technical paper titled “Lean Attention: Hardware-Aware Scalable Attention Mechanism for the Decode-Phase of Transformers” was published by researchers at Microsoft. Abstract: "Transformer-based models have emerged as one of the most widely used architectures for natural language processing, natural language generation, and image generation. The size of the state-of-the-art models has in... » read more

High Performance and Low-Noise Hardware Board For Side-Channel Evaluations


A new technical paper titled "EFFLUX-F2: A High Performance Hardware Security Evaluation Board" was published by researchers at Nanyang Technological University (Singapore) and Indian Institute of Technology Jodhpur. Abstract "Side-channel analysis has become a cornerstone of modern hardware security evaluation for cryptographic accelerators. Recently, these techniques are also being applie... » read more

Ferroelectric Memory-Based IMC for ML Workloads


A new technical paper titled "Ferroelectric capacitors and field-effect transistors as in-memory computing elements for machine learning workloads" was published by researchers at Purdue University. Abstract "This study discusses the feasibility of Ferroelectric Capacitors (FeCaps) and Ferroelectric Field-Effect Transistors (FeFETs) as In-Memory Computing (IMC) elements to accelerate mach... » read more

Proof-of-Concept On-Chip Flow Cytometer Using Integrated Photonics (imec, Sarcura)


A new technical paper titled "On-chip flow cytometer using integrated photonics for the detection of human leukocytes" was published by researchers at imec and Sarcura GmbH. Abstract "Differentiation between leukocyte subtypes like monocytes and lymphocytes is essential for cell therapy and research applications. To guarantee the cost-effective delivery of functional cells in cell therapies... » read more

DRAM Microarchitectures And Their Impacts On Activate-Induced Bitflips Such As RowHammer 


A technical paper titled “DRAMScope: Uncovering DRAM Microarchitecture and Characteristics by Issuing Memory Commands” was published by researchers at Seoul National University and University of Illinois at Urbana-Champaign. Abstract: "The demand for precise information on DRAM microarchitectures and error characteristics has surged, driven by the need to explore processing in memory, enh... » read more

Competitive Open-Source EDA Tools


A technical paper titled “Basilisk: Achieving Competitive Performance with Open EDA Tools on an Open-Source Linux-Capable RISC-V SoC” was published by researchers at ETH Zurich and University of Bologna. Abstract: "We introduce Basilisk, an optimized application-specific integrated circuit (ASIC) implementation and design flow building on the end-to-end open-source Iguana system-on-chip (... » read more

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