category: Top Stories

category: Auto, Security & Edge AI

The Next Phase Of Machine Learning
By Kevin Fogarty - 09 Nov, 2017 - Comments: 0

Machine learning is all about doing complex calculations on huge volumes of data with increasing efficiency, and with a growing stockpile of success stories it has rapidly evolved from a rather obscure computer science concept into the go-to method for everything from facial recognition technology to autonomous cars. [getkc id="305" kc_name="Machine learning"] can apply to every corporate fu... » read more

Mixed Messages For Mixed-Signal
By Brian Bailey - 09 Nov, 2017 - Comments: 1

There is no such thing as a purely digital design at advanced nodes today. Even designs that have no [getkc id="37" kc_name="analog"] content are likely relying on [getkc id="38" kc_name="mixed-signal"] components such as SerDes for communications, or voltage regulators for adaptive power control. But the days of purposely attempting to integrate everything including analog and RF onto a single... » read more

New Power Concerns At 10/7nm
By Ann Mutschler - 16 Oct, 2017 - Comments: 1

As chip sizes and complexity continues to grow exponentially at 7nm and below, managing power is becoming much more difficult. There are a number of factors that come into play at advanced nodes, including more and different types of processors, more chip-package decisions, and more susceptibility to noise of all sorts due to thinner insulation layers and wires. The result is that engineers ... » read more

Data Centers Turn To New Memories
By Ann Mutschler - 12 Oct, 2017 - Comments: 3

DRAM extensions and alternatives are starting to show up inside of data centers as the volume of data being processed, stored and accessed continues to skyrocket. This is having a big impact on the architecture of data centers, where the goal now is to move processing much closer to the data and to reduce latency everywhere. Memory has always been a key piece of the Von Neumann compute archi... » read more

Trimming Waste In Chips
By Brian Bailey - 12 Oct, 2017 - Comments: 0

Extra circuitry costs money, reduces performance and increases power consumption. But how much can really be trimmed? When people are asked that question they either get defensive or they see it as an opportunity to show the advantages of their architecture, design process or IP. The same holds true for IP suppliers. Others point out that the whole concept of waste is somewhat strange, becau... » read more

Noise Abatement
By Brian Bailey - 12 Oct, 2017 - Comments: 0

[getkc id="285" kc_name="Noise"] is a fact of life. Almost everything we do creates noise as a by-product and quite often what is a signal to one party is noise to another. Noise cannot be eliminated. It must be managed. But is noise becoming a larger issue in chips as the technology nodes get smaller and packaging becomes more complex? For some, the answer is a very strong yes, while for ot... » read more

Power Modeling And Analysis
By Brian Bailey - 27 Sep, 2017 - Comments: 0

Semiconductor Engineering sat down to discuss power modeling and analysis with [getperson id="11489" p_name="Drew Wingard"], CTO at [getentity id="22605" e_name="Sonics"]; [getperson id="11763" comment="Tobias Bjerregaard"], CEO at [getentity id="22908" e_name="Teklatech"]; Vic Kulkarni, vice president and chief strategy officer at [getentity id="22021" e_name="Ansys"]; Andy Ladd, CEO of Baum; ... » read more

Managing Peak Power
By Ann Mutschler - 20 Sep, 2017 - Comments: 0

Peak power is becoming a serious design constraint across chips and entire electronic systems as more functionality is added into end devices and the compute and switching infrastructure needed to support them. The issues are a direct result of growing complexity in designs, fixed or shrinking power budgets, and the need to process more data more quickly. In mobile devices, the addition of m... » read more

Power Modeling and Analysis
By Brian Bailey - 20 Sep, 2017 - Comments: 0

Semiconductor Engineering sat down to discuss power modeling and analysis with [getperson id="11489" p_name="Drew Wingard"], chief technology officer at [getentity id="22605" e_name="Sonics"]; [getperson id="11763" comment="Tobias Bjerregaard"], chief executive officer for [getentity id="22908" e_name="Teklatech"]; Vic Kulkarni, vice president and chief strategy officer at [getentity id="22021"... » read more

Frenzy At 10/7nm
By Ann Mutschler - 14 Sep, 2017 - Comments: 1

The number of chipmakers rushing to 10/7nm is rising, despite a slowdown in Moore's Law scaling and the increased difficulty and cost of developing chips at the most advanced nodes. How long this trend continues remains to be seen. It's likely that 7/5nm will require new manufacturing equipment, tools, materials and transistor structures. Beyond that, there is no industry-accepted roadmap, m... » read more

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