Buying And Selling EDA Companies


By Ed Sperling The rule of thumb for mergers and acquisitions is that the majority will fail. So why, despite concerns about big companies buying up the tools of startups, does EDA’s track record look so good? There are a number of answers that are unique to the EDA industry: There is no manufacturing that needs to be absorbed by the acquirer, which greatly simplifies any deal. Sale... » read more

Aging: Not Always A Bad Thing


By Ann Steffora Mutschler When IC devices are produced and shipped to end customers, it is important that they will function as specified in the application environment. Determining how a device will operate over time is a key aspect of overall reliability and is commonly referred to as ‘aging.’ Aging of electronics is not a new problem. In fact, analog and automotive designers have bee... » read more

Managing Memory With Embedded Software


By Ann Steffora Mutschler Memory is shaping up to be a key leverage point for embedded software going forward as it represents such a large fraction of the silicon real estate in today’s SoCs. Managing memory effectively and memory bandwidth also represents a significant fraction of the potential bottlenecks and the power dissipation. As such, everything embedded software can do to enhance h... » read more

Experts At The Table: Next-Generation IP Landscape


By Ann Steffora Mutschler System-Level Design sat down to discuss predictions about the next generation design IP landscape with Robert Aitken, R&D fellow at ARM; Laurent Moll, chief technical officer at Arteris; Susan Peterson, group director, product marketing for verification IP & memory models in the system & software realization group at Cadence; and John Koeter, vice preside... » read more

Experts At The Table: Automotive Electronics


By Ann Steffora Mutschler System-Level Design sat down to discuss the opportunities in automotive electronics with Alexandre Palus, principal SoC architect at Altera; Aveek Sarkar, VP of product engineering & support at Apache; Mladen Nizic, engineering director, mixed signal solution at Cadence; and Stephen Pateras, product marketing director, silicon test solutions at Mentor Graphics. W... » read more

Experts At The Table: Automotive Electronics


By Ann Steffora Mutschler System-Level Design sat down to discuss the opportunities in automotive electronics with Alexandre Palus, principal SoC architect at Altera; Aveek Sarkar, VP of product engineering & support at Apache; Mladen Nizic, engineering director, mixed signal solution at Cadence; and Stephen Pateras, product marketing director, silicon test solutions at Mentor Graphics. W... » read more

3D IC Supply Chain: Still Under Construction


By Barbara Jorgensen and Ed Sperling Stacked die, which promise high levels of integration, a tiny footprint, energy conservation and blinding speed, still have some big hurdles to overcome. Cost, packaging and manufacturability continue to make steady progress, with test chips being produced by all of the major foundries. But in a disaggregated ecosystem, the supply chain remains a big st... » read more

New Silos Form In IC Industry


By Ed Sperling For the past couple of decades corporations around the globe have been focused on down silos. In fact, it has become a mantra. It’s considered essential for making established corporations even more successful, and it’s almost always at the center of turnaround plans for troubled companies. Moreover, across a full spectrum of companies, it’s regularly cited by management c... » read more

Measuring Verification Productivity


By Ann Steffora Mutschler In this era of mammoth SoCs that require the utmost in verification complexity, it’s not enough to have a methodology. Design and verification teams also need to measure their productivity to constantly stay ahead of the curve. The more sophisticated customers are measuring a lot of things, explained Steve Bailey, marketing director at Mentor Graphics, “and for... » read more

GPUs May Speed UP EDA Algorithms


The sequential EDA algorithms of old cannot keep pace with increasing design complexity, which is driving the industry to look at parallelism and other computational architectures such as the graphical processing unit (GPU). A 10X or 20X speedup for gate-level simulations means that a test that runs today in a week will run in less than a day, and a test that runs today in a month will run i... » read more

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