category: Top Stories

category: IoT, Security & Automotive

Analog Migration Equals Redesign
By Ann Mutschler - 24 May, 2018 - Comments: 1

Analog design has never been easy. Engineers can spend their entire careers focused just on phase-locked loops (PLLs), because to get them right the functionality of circuits need to be understood in depth, including how they respond across different process corners and different manufacturing processes. In the finFET era, those challenges have only intensified for analog circuits. Reuse, fo... » read more

Get Ready For Verification 3.0
By Brian Bailey - 24 May, 2018 - Comments: 0

Jim Hogan, managing partner of Vista Ventures, LLC, is perhaps the best-known investor in the EDA space. Recently, he has been focusing time and attention on verification startups, including cloud technology company Metrics, and Portable Stimulus pioneer Breker Verification Systems. This adds to his longer-term commitment to formal verification with OneSpin Solutions. These companies are part ... » read more

CEO Outlook On Chip Industry (Part 1)
By Ed Sperling - 24 May, 2018 - Comments: 1

Semiconductor Engineering sat down with Wally Rhines, president and CEO of Mentor, a Siemens Business; Simon Segars, CEO of Arm; Grant Pierce, CEO of Sonics; and Dean Drako, CEO of IC Manage. What follows are excerpts of that conversation. L-R: Dean Drako, Grant Pierce, Wally Rhines, Simon Segars. Photo: Paul Cohen/ESD Alliance SE: What are the big changes ahead, and where do you see th... » read more

Quantum Effects At 7/5nm And Beyond
By Ed Sperling - 23 May, 2018 - Comments: 5

Quantum effects are becoming more pronounced at the most advanced nodes, causing unusual and sometimes unexpected changes in how electronic devices and signals behave. Quantum effects typically occur well behind the curtain for most of the chip industry, baked into a set of design rules developed from foundry data that most companies never see. This explains why foundries and manufacturing e... » read more

EDA In The Cloud (Part 3)
By Brian Bailey - 23 May, 2018 - Comments: 1

Semiconductor Engineering sat down to discuss the migration of EDA tools into the Cloud with Arvind Vel, director of product management at ANSYS; Michal Siwinski, vice president of product management at Cadence; Richard Paw, product marketing manager at DellEMC, Gordon Allan, product manager at Mentor, a Siemens Business; Doug Letcher, president and CEO of Metrics, Tom Anderson, technical marke... » read more

200mm Fab Crunch
By Mark LaPedus - 21 May, 2018 - Comments: 2

Growing demand for analog, MEMS and RF chips continues to cause acute shortages for both 200mm fab capacity and equipment, and it shows no sign of letting up. Today, 200mm fab capacity is tight with a similar situation projected for the second half of 2018 and perhaps well into 2019. In fact, 2018 will likely represent the third consecutive year that 200mm fab capacity will be tight. The sam... » read more

RF SOI Wars Begin
By Mark LaPedus - 17 May, 2018 - Comments: 2

Several foundries are expanding their fab capacities for RF SOI processes amid huge demand and shortages of this technology for smartphones. A number of foundries are increasing their 200mm RF SOI fab capacities to meet soaring demand. Then, GlobalFoundries, TowerJazz, TSMC and UMC are expanding or bringing up RF SOI processes in 300mm fabs in an apparent race to garner the first wave of RF ... » read more

FinFET Metrology Challenges Grow
By Mark LaPedus - 17 May, 2018 - Comments: 1

Chipmakers face a multitude of challenges in the fab at 10nm/7nm and beyond, but one technology that is typically under the radar is becoming especially difficult—metrology. Metrology, the art of measuring and characterizing structures, is used to pinpoint problems in devices and processes. It helps to ensure yields in both the lab and fab. At 28nm and above, metrology is a straightforward... » read more

Chipmakers Look Beyond Scaling
By Ed Sperling - 17 May, 2018 - Comments: 1

Gary Patton, CTO of GlobalFoundries, sat down with Semiconductor Engineering to discuss the rollout of EUV, the rising cost of designing chips at the most advanced nodes, and the growing popularity of 22nm planar FD-SOI in a number of markets. What follows are excerpts of that conversation. SE: You've just begun deploying EUV. Are you experiencing any issues? Patton: It's a very complicat... » read more

Integrating Memristors For Neuromorphic Computing
By Katherine Derbyshire - 16 May, 2018 - Comments: 1

Much of the current research on neuromorphic computing focuses on the use of non-volatile memory arrays as a compute-in-memory component for artificial neural networks (ANNs). By using Ohm’s Law to apply stored weights to incoming signals, and Kirchoff’s Laws to sum up the results, memristor arrays can accelerate the many multiply-accumulate steps in ANN algorithms. ANNs are being dep... » read more

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