category: Top Stories

category: Auto, Security & Edge AI

EDA In The Cloud
By Brian Bailey - 26 Apr, 2018 - Comments: 4

Semiconductor Engineering sat down to discuss the migration of EDA tools into the Cloud with Arvind Vel, director of product management at ANSYS; Michal Siwinski, vice president of product management at Cadence; Richard Paw, product marketing manager at DellEMC, Gordon Allan, product manager at Mentor, a Siemens Business; Doug Letcher, president and CEO of Metrics, Tom Anderson, technical marke... » read more

Next EUV Issue: Mask 3D Effects
By Mark LaPedus - 25 Apr, 2018 - Comments: 6

As extreme ultraviolet (EUV) lithography moves closer to production, the industry is paying more attention to a problematic phenomenon called mask 3D effects. Mask 3D effects involve the photomask for EUV. In simple terms, a chipmaker designs an IC, which is translated from a file format into a photomask. The mask is a master template for a given IC design. It is placed in a lithography scan... » read more

New Market Drivers
By Brian Bailey - 25 Apr, 2018 - Comments: 0

Semiconductor Engineering sat down to discuss changing market dynamics with Steve Mensor, vice president of marketing for [getentity id="22926" e_name="Achronix"]; Apurva Kalia, vice president of R&D in the System and Verification group of [getentity id="22032" e_name="Cadence"]; Mohammed Kassem, CTO for [getentity id="22910" comment="efabless"]; Matthew Ballance, product engineer and techn... » read more

Tech Tackles Health Care
By Jeff Dorsch - 23 Apr, 2018 - Comments: 0

Can technology make humans healthier? If technology investments in this market are any indication, the answer is a firm “yes.” Massive growth in this market has been predicted for years. In fact, it was the initial driver behind many of the initial IoT devices, which fizzled largely because of insufficiently developed end applications and poor battery life of wearable devices. Much has c... » read more

Design Rule Complexity Rising
By Ed Sperling - 19 Apr, 2018 - Comments: 0

Variation, edge placement error, and a variety of other issues at new process geometries are forcing chipmakers and EDA vendors to confront a growing volume of increasingly complex, and sometimes interconnected design rules to ensure chips are manufacturable. The number of rules has increased to the point where it's impossible to manually keep track of all of them, and that has led to new pr... » read more

New Patterning Options Emerging
By Mark LaPedus - 19 Apr, 2018 - Comments: 1

Several fab tool vendors are rolling out the next wave of self-aligned patterning technologies amid the shift toward new devices at 10/7nm and beyond. Applied Materials, Lam Research and TEL are developing self-aligned technologies based on a variety of new approaches. The latest approach involves self-aligned patterning techniques with multi-color material schemes, which are designed for us... » read more

Searching For EUV Defects
By Mark LaPedus - 19 Apr, 2018 - Comments: 1

Chipmakers hope to insert extreme ultraviolet (EUV) lithography at 7nm and/or 5nm, but several challenges need to be solved before this oft-delayed technology can be used in production. One lingering issue that is becoming more worrisome is how to find defects caused by [gettech id="31045" comment="EUV"] processes. These processes can cause random variations, also known as stochastic effects... » read more

Designing 5G Chips
By Ann Mutschler - 18 Apr, 2018 - Comments: 0

5G is the wireless technology of the future, and it’s coming fast. The technology boasts very high-speed data transfer rates, much lower latency than 4G LTE, and the ability to handle significantly higher densities of devices per cell site. In short, it is the best technology for the massive amount of data that will be generated by sensors in cars, IoT devices, and a growing list of next-g... » read more

More Lithography/Mask Challenges (Part 2)
By Mark LaPedus - 17 Apr, 2018 - Comments: 3

Semiconductor Engineering sat down to discuss lithography and photomask technologies with Gregory McIntyre, director of the Advanced Patterning Department at [getentity id="22217" e_name="Imec"]; Harry Levinson, senior fellow and senior director of technology research at [getentity id="22819" comment="GlobalFoundries"]; Regina Freed, managing director of patterning technology at [getentity id="... » read more

What Happened To UPF?
By Brian Bailey - 16 Apr, 2018 - Comments: 1

Two years ago there was a lot of excitement, both within the industry and the standards communities, about rapid advancements that were being made around low-power design, languages and methodologies. Since then, everything has gone quiet. What happened? At the time, it was reported that the [gettech id="31043" comment="IEEE 1801"] committee was the largest active committee within the IEEE. ... » read more

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