category: Top Stories

category: Auto, Security & Edge AI

Starting Point Is Changing For Designs
By Ed Sperling - 04 Oct, 2017 - Comments: 0

The starting point for semiconductor designs is shifting. What used to be a fairly straightforward exercise of choosing a processor based on power or performance, followed by how much on-chip versus off-chip memory is required, has become much more complicated. This is partly due to an emphasis on application-specific hardware and software solutions for markets that either never existed befo... » read more

Prototypes Proliferate
By Brian Bailey - 02 Oct, 2017 - Comments: 0

Hardware prototyping and [getkc id="30" kc_name="emulation"] have been two sides of the same coin ever since the [gettech id="31071" comment="FPGA"] became a commercial success. Early emulators were all built from FPGAs, and most were used in-circuit, much like prototypes are today. More recently, emulation has become a major piece of the [getkc id="10" kc_name="verification"] flow, to the poin... » read more

System Coverage Undefined
By Brian Bailey - 28 Sep, 2017 - Comments: 1

When is a design ready to be taped out? That has been one of the toughest questions to confront every design team, and it's the one verification engineers lose sleep over. Exhaustive [getkc id="56" kc_name="coverage"] has not been possible since the 1980s. Several metrics and methodologies have been defined to help answer the question and to raise confidence that important aspects of a block... » read more

Verifying AI, Machine Learning
By Ed Sperling - 28 Sep, 2017 - Comments: 0

[getperson id="11306" comment="Raik Brinkmann"], president and CEO of [getentity id="22395" e_name="OneSpin Solutions"], sat down to talk about artificial intelligence, machine learning, and neuromorphic chips. What follows are excerpts of that conversation. SE: What's changing in [getkc id="305" kc_name="machine learning"]? Brinkmann: There’s a real push toward computing at the edge. ... » read more

Verification’s Breaking Points
By Ann Mutschler - 28 Sep, 2017 - Comments: 2

Verification efficiency and speed can vary significantly from one design to the next, and that variability is rising alongside growing design complexity. The result is a new level of unpredictability about how much it will cost to complete the verification process, whether it will meet narrow market windows, and whether quality will be traded off to get a chip out on time in the hopes that it c... » read more

Plugging Gaps In Advanced Packaging
By Ann Mutschler - 27 Sep, 2017 - Comments: 0

The growing difficulty of cramming more features into an SoC is driving the entire chip industry to consider new packaging options, whether that is a more complex, integrated SoC or some type of advanced packaging that includes multiple chips. Most of the work done in this area so far has been highly customized. But as advanced packaging heads into the mainstream, gaps are beginning to appea... » read more

Power Modeling And Analysis
By Brian Bailey - 27 Sep, 2017 - Comments: 0

Semiconductor Engineering sat down to discuss power modeling and analysis with [getperson id="11489" p_name="Drew Wingard"], CTO at [getentity id="22605" e_name="Sonics"]; [getperson id="11763" comment="Tobias Bjerregaard"], CEO at [getentity id="22908" e_name="Teklatech"]; Vic Kulkarni, vice president and chief strategy officer at [getentity id="22021" e_name="Ansys"]; Andy Ladd, CEO of Baum; ... » read more

Looming Issues And Tradeoffs For EUV
By Mark LaPedus - 25 Sep, 2017 - Comments: 5

Momentum is building for extreme ultraviolet (EUV) lithography, but there are still some major challenges to solve before this long-overdue technology can be used for mass production. [gettech id="31045" comment="EUV"] lithography—a next-generation technology that patterns tiny features on a chip—was supposed to move into production around 2012. But over the years, EUV has encountered se... » read more

What Happened To ReRAM?
By Mark LaPedus - 21 Sep, 2017 - Comments: 8

Resistive RAM (ReRAM), one of a handful of next-generation memories under development, is finally gaining traction after years of setbacks. Fujitsu and Panasonic are jointly ramping up a second-generation ReRAM device. In addition, Crossbar is sampling a 40nm ReRAM technology, which is being made on a foundry basis by China’s SMIC. And not to be outdone, TSMC and UMC recently put ReRAM on ... » read more

Unsolved Litho Issues At 7nm
By Ed Sperling - 21 Sep, 2017 - Comments: 1

By Ed Sperling & Mark LaPedus EUV lithography is creating a new set of challenges on the photomask side for which there currently are no simple solutions. While lithography is viewed as a single technology, [gettech id="31045" comment="EUV"] actually is a collection of technologies. Not all of those technologies have advanced equally and simultaneously, however. For example, aberrations... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2026 SMG   |  Terms of Service  |  Privacy Policy