Unsolved Litho Issues At 7nm

Computational challenges on the rise with EUV. Scanners are no longer interchangeable.


By Ed Sperling & Mark LaPedus
EUV lithography is creating a new set of challenges on the photomask side for which there currently are no simple solutions.

While lithography is viewed as a single technology, EUV actually is a collection of technologies. Not all of those technologies have advanced equally and simultaneously, however. For example, aberrations in the mirror used to reflect the EUV laser beam can result in high background flare. Likewise, imperfections in the lens through which that beam is focused, or other impurities anywhere in the complex array of technologies, can result in surface roughness on the wafer. Add to that photon shot noise, overlay issues, and it’s daunting to get these systems to work at all, let alone consistently.

These issues are diverse, and none individually is a showstopper, but their impact can be cumulative. They affect throughput in the fab as well as yield. And they are prompting questions behind the scenes about how aggressively foundries should migrate from multi-patterning using 193nm immersion lithography to EUV.

With immersion, for example, one lithography scanner is considered virtually interchangeable with another. So a photomask maker could create an optical mask for a traditional optical scanner. The mask was interchangeable. the same mask could work in any scanner.

With EUV, however, there are potential aberrations with the EUV mask. In other words, the EUV mask may or may not be interchangeable between one EUV scanner with another, which could disrupt the entire mask-making process.

“The historical paradigm is that one model represents all scanners,” said John Sturtevant, director of technical marketing at Mentor, a Siemens Business. “So you could make one version of a mask, and the implication was that one version would be representative of the entire fleet of scanners. Now we’re facing the possibility of as many copies of masks as tools you have. That would be disruptive for EUV.”

Chris Mack, CTO of Fractilia, has observed the same issue. “In the past, scanners were so well matched that I could build a mask and put it on any scanner I wanted,” he said. “What we found in the last year is that the cross-slit aberrations on the [pre-production ASML NXE:3300B] were sufficiently large. To get the critical dimension uniformity that we were hoping for, people were proposing the idea of OPCing (optical proximity correcting) the mask to correct for the systematic aberrations along the slit and the scanner. Then you had a mask that was dedicated to that scanner. And then you would have a different mask if you wanted to use a different scanner.”

Mack said ASML has been working to solve this problem with its follow-on system, the NXE: 3400B, which is now shipping. “So the real question is, are the aberrations sufficiently reduced in the 3400 so that we don’t have to dedicate a mask per scanner? We don’t have the data yet. I’m sure ASML is trying very hard to make sure that it is not the case for the 3400,” he said.

And, in fact, the new model has incorporated improvements. But each scanner still has its own fingerprint, even though that fingerprint is less pronounced than in the past.

Other problems can crop up, as well. “The big impact here is time,” said Ben Rathsack, senior member of the technical staff at TEL. “It falls into the same category as contamination on mirrors in a vacuum system. So you can clean the system and you can refresh the lenses, but the question is how long is the system up and running? This is not a fundamental defect, but it does affect time and throughput. If you have a down tool, sometimes you have no choice but to move it to a tool with a different fingerprint.”

Rathsack noted this isn’t unique to EUV. Immersion lithography has the same issues because the tolerances for overlay and critical dimensions are so tight with advanced nodes that any variation can cause problems.

ASML is busy trying to solve these issues, but that takes time. The fact that EUV systems can generate enough power to provide reasonable throughput was a first step. Further improvements based upon computation and manufacturability are next, and they involve more players in the manufacturing ecosystem.

EUV, in fact, requires a great deal of process control. For example, ASML has an inline overlay metrology tool. The data is fed from the overlay tool into ASML’s computational lithography models as a means to optimize the control of a scanner.

“We have a lot of metrology on the scanner itself already,” said Henk Niesing, director of product management at ASML. “We measure every wafer in terms of alignment, leveling and focus. The prime part we have introduced with [the Hermes Microvision technology] is trying to improve our models. Building an OPC model is taking a tremendous amount of time nowadays. Speeding that up is key.”

Niesing said one of the challenges that ASML has been wrestling with is how to measure everything precisely without severely impacting wafer throughput.

“From the design point of view we can already predict where these patterns will fill, together with the metrology that we measure halfway,” he said. “We know from the design and the optical models that we have where the sensitive areas of the chip are, where the process window is minimal. We know that [there] could be an area for potential fill. Every customer has a library of the areas that are sensitive within the chip. We try to take all the data on the [wafer] that is available from the scanner and from the metrology tools—the focus data of the scanner, the overlay data of the scanner, and CD data off the edge. With that you know where the weak spots are, you know what the scanner actually did on that wafer, and basically we predict where the atoms will fill.”

There is a downside, however. “An e-beam tool is a great tool, but it’s slow and you can definitely not measure a full wafer because it will take you many, many days. So we say, ‘We’ll predict where the patterns will fill, or a high chance where they will fill,’ and tell the e-beam tool to only just take those fields and measure them,” he said.

Nevertheless, these problems get harder to solve at each new node and new ones crop up. Possibly at 5nm and certainly at 3nm, EUV will require high-numerical aperture technology.

“This will require all kinds of computational lithography,” said Mentor’s Sturtevant. “Aberrations are more pronounced, and they can have an effect on overlay. Right now we have to account for CD (critical dimensions) and pattern placement from aberrations, which can cause overlay errors. When you have relative image placement on two layers, you use computational lithography to make sure those layers are lined up on top of each other.”

Aberrations make it more difficult to line up those masks and all of the features, such as metal 1 and metal 2 vias, and the smaller the aperture the harder it is to account for all of those aberrations using computational methods.

Fig. 1: EUV relies on reflected light. Source: ASML/Carl Zeiss

Shot noise
Another lingering computational problem is shot noise, a concept that was first identified nearly 100 years ago by Walter Schottky, a German physicist who observed current fluctuations in electrons inside of vacuum tubes. Those same issues affect photons as well as electrons. The number of photons emitted from a laser vary slightly over time, but with fewer electrons those variations become statistically more significant.

How much of a problem that causes with EUV isn’t entirely clear, but it does have to be accounted for to determine how EUV interacts with resists.

“We have a fewer number of photons that are very high in energy,” said Gregory McIntyre, director of the Advanced Patterning Department at Imec. “As they smash into things, they create electrons that, in turn, go off to do things to create the chemistry. And with this there are a lot of things that we just simply don’t know. We don’t know how many electrons are being generated, what are the energy distributions, and then what are the chemical reactions that they end up doing. What we would describe as challenge number one in imaging is in the extreme roughness events or the stochastic failures in places like nano-bridging, line breaking and merging or missing holes. Addressing these nano-bridge challenges is really our first problem that needs to be addressed.”

If two lines bridge—or nano-bridge—they create a short. If one of the lines opens, it creates an open circuit.

Fig. 2: EUV shot noise. Source: Wikipedia.

Fewer photons also make it more difficult to predict quality, as well. “Right now you can count double digits of photons hitting the mask,” said Sturtevant. “If you think about three-sigma manufacturing, that’s 99.75% accurate. That sounds good until you realize that at 7nm there are 4 billion vias, and you only need one not to print for the chip not to yield. So that means you need seven-sigma or eight-sigma accuracy. But are the stochastic models used in manufacturing safe at eight-sigma or nine-sigma? And how does that affect fab throughput?”

These are hardly the only problems in lithography. Each new node and tool adds its own issues that need to be solved, and EUV is still a newcomer in the commercial lithography world even though it has been under development for more than a decade. But computational issues, if not showstoppers, still impact the basic reason for adopting EUV in the first place—faster throughput in the fab.

“Ideally, software systems will be advanced enough so that computationally a fab can deal with all of these issues,” said TEL’s Rathsack. “These aren’t physics problems, but they are logistical problems.”

And they’re not easy to solve. “We have been working on background flare, which can cause degradation of the image,” said Sturtevant. “There are now tighter specs on polishing mirrors, and flare has come down and may continue to come down even further. But it’s still a phenomenon you have to take care of before you simulate the image. With EUV, that flare can span millimeters, so the effects need to be accounted for. And lens aberrations with EUV are an entire order of magnitude higher than with [immersion], so you can’t ignore them like you could in the past.”

Some of this can be accounted for computationally in tools. Some of it needs to be dealt with in other ways. But it’s certainly getting more expensive and time-consuming to solve these issues, and there seems to be no shortage of new ones ahead.

Related Stories
What Happened To Inverse Lithography?
Technology resurges as industry pushes to 7nm and 5nm.
Big Changes In Patterning
The shift to GPU-accelerated mask writing and curvilinear shapes could fundamentally change chip design and manufacturing.
Inside Photomask Writing
What technologies will be used at 5nm and why.
Extending EUV Beyond 3nm
Now that EUV is finally shipping, companies are working on extending it much further using anamorphic lenses and high numerical aperture technology.


memister says:

Very nice piece, not like other articles which are based on marketed information from ASML and the foundries. The LithoVision 2017 talk by Dr. Sturtevant actually mentioned also the aberration variations at different slit positions besides different scanners. These aberrations actually need to be corrected by SMO (source-mask optimization) instead of just OPC, since it is the illumination that is causing the aberration and changing the mask features only offer first-order corrections. That would mean different masks at each slit position.

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