How Quickly Can SiC Ramp?

New capacity planned for 2024, but production will depend on equipment availability.


Device makers across the globe are ramping silicon carbide (SiC) manufacturing, with growth set to really take off starting in 2024.

It’s been almost five years since Tesla and STMicroelectronics threw down the gauntlet with SiC in the Model 3. Now, no one doubts the market pull for electric vehicles, but consumers are still clamoring for better range and faster charging. SiC devices are a key to satisfying these concerns, which is why IDMs and foundries are setting the stage for a high-growth era. New manufacturing facilities are being built, and equipment is being ordered.

Fig. 1: The power SiC device market is growing at a CAGR of 34% (2021-2027), driven primarily by the automotive, but also industrial, energy and other transportation markets. Source: Yole Développement

But ramping a new technology for high volume takes time. Behind the scenes, manufacturing equipment suppliers had to work closely with their customers to adapt existing equipment or design completely new solutions for high-throughput, high-yield SiC manufacturing.

SiC is a very expensive and it’s an extremely hard material. But SiC wafers also are very brittle, so they need to be handled with exceptional care. Because they are transparent, previous generations of sensors used in handling systems couldn’t see them. The wafers tend to bow, so an industry used to the flatness of silicon wafers has had to adapt. And the material has some particular characteristics that make certain processes like doping very difficult.

With such promising market opportunities, however, many of the leading SiC IDMs have announced expansions of their manufacturing facilities. Wolfspeed has its new 200mm fab in upstate New York. Bosch is adding almost 40,000 square feet of new SiC-dedicated cleanroom in Germany. Rohm opened a new facility in Japan, targeting a 5X increase in SiC manufacturing over the next five years. Infineon has just started construction of a new SiC fab in Malaysia. The Japanese press reports that Toshiba plans to increase SiC production three-fold by 2024 and 10X by 2026. And the list goes on.

That’s a lot of cleanroom space to fill with equipment. Some of the equipment used in silicon lines can also be used in SiC lines. But high-volume manufacturing requires some specially adapted tools.

SEMI recently teamed up with Victor Veliadis, Executive Director and CTO of the PowerAmerica consortium for an online webinar entitled SiC-Silicon Carbide Material Properties, Fabrication Basics, and Key Applications. In an interview with Semiconductor Engineering, Veliadis detailed some of the points (see figure 2).

Fig. 2: The critical differences between SiC and Si manufacturing processes. Source: Victor Veliadis/PowerAmerica

“When you come up with a new technology, you want to basically leverage as much of the silicon infrastructure as possible, because that’s the only way you’re going to be economically viable,” said Veliadis. However, there are still specificities.

What IDMs and foundries need
With the ramp for Tesla, STMicroelectronics fast-tracked early to high volumes.

“A major challenge of equipment dedicated to SiC is related to wafer handling, in addition to multiple process requirements,” said Giuseppe Arena, program management office director for the Power Transistor Sub-Group of ST’s Automotive Product Group. “Due to the inherent chemical-physical peculiarities of wide-bandgap materials, we’re using some new equipment and processes in the manufacturing flow. This is especially true for high-temperature epitaxy and ion implantation processes and thermal treatments, compared to the ones usually used for silicon-based power devices.”

SiC epitaxy is particularly critical to control crystal defects during the process and to maintain throughput. “It requires the availability of properly designed epi-reactors,” Arena explained. “From a SiC etching standpoint, it requires the availability of properly designed plasma etchers. The wafer thinning process also requires special tools to manage the hardness characteristics of this material. We’ve also modified cleaning steps and etching and deposition processes to tailor them to the specificity of this material. Finally, equipment suppliers have adapted the handling systems of some key equipment to the characteristic transparency of SiC wafers.”

Because process and design are so closely linked in SiC, it largely has remained an IDM-dominated business. But foundry X-Fab saw the opportunities early on.

“It’s an exciting time to be in the silicon carbide business,” said Agnes Jahnke, product marketing manager for SiC & GaN at X-Fab. “As the first pure-play foundry for SiC — we started our engagement around 10 years ago — we have been growing our SiC capacities constantly. X-Fab has a long history of working closely with our equipment suppliers, and we added dedicated SiC manufacturing equipment like implanters and SiC epitaxy in the early stage, which was a very good decision as the lead times for equipment are currently skyrocketing. But it’s not only about capacity. It’s also about quality. Our engineers are continuously improving the SiC processing and supporting our customers to improve yield and throughput, which are both also very important factors to manage the SiC chip supply. Thus, X-Fab managed to establish a solid customer base of SiC customers that are supplying the world with SiC transistors and diodes to support the green energy transition.”

There also are new foundries dedicated to SiC. Clas-SiC in Scotland is a good example, but it has taken a different approach to filling the fab floor with equipment. “We are a new company, about five years old,” said managing director Rae Hyndman. “We have a new, fully operational, end-to-end processing, production volume, 150 mm, open wafer fab that is dedicated to SiC processing only. Most of the engineering team are a highly experienced group of engineers with about 20 to 35 years’ experience in high-volume automotive silicon. A good number of the team have had 10 to 15 years’ experience in SiC development We had our new wafer fab designed and built just over three years ago, and we purchased the majority of equipment as fully refurbished 150mm equipment, or new.” About 10% to 15% is specialized SiC equipment, she noted.

Availability of equipment remains an issue everywhere. “I would say that lead time for wafer fab and test equipment is the biggest challenge, and I’d say this is across the board for all semiconductor equipment,” Hyndman said. “This is due to the surge in demand across the world for semiconductors in general, both traditional silicon and compound semiconductors. Compound semiconductors is also driving demand in refurbished 150mm equipment.”

That said, “It is down to resources and tool and parts availability for refurbishment – Covid won’t have helped this,” she added.

Other IDMs are considering the conversion of silicon lines to SiC. Veliadis maintains that a 150mm silicon manufacturing line can be converted into an SiC line for about $20 million by adapting existing processes and equipment, and purchasing just a few key new tools. This is a way to breathe new life into old silicon fabs that are struggling to stay full, or which otherwise would be shutting down.

Suppliers step up
Equipment makers are investing heavily in this market. “Lam has process tools deployed in many aspects of SiC fabrication including SiC trench etch, dielectric deposition and etch, thick metal processing, and device passivation,” said David Haynes, vice president for specialty technologies in Lam Research’s Customer Support Business Group. “Today we are focused on ensuring that we are prepared to address critical applications at 200mm as the technology transitions from 150mm over the next several years.” The company’s latest deposition tool for power semiconductors is shown in figure  3.

SiC power electronics rely on either planar or trench-based MOSFET structures, as well as diodes. “In these applications, the critical process steps are manufactured on the SiC wafer itself,” Haynes said. “SiC epitaxy, high-temperature/high-energy ion implantation, and high-temperature anneals are key steps. SiC trench etch for MOSFET fabrication is also critical, as is the deposition of high-quality ion implant masks and anneal caps that prevent carbon loss from the substrate during annealing. In the BEOL, thick metal processing and the deposition of high-performance passivation are key.”

In general, with respect to etch, deposition and clean processes, established Si process tools can be used for SiC device fabrication. “But they do typically need to be adapted in order to handle SiC and Si substrates,” he said. “A common challenge across all platforms is wafer handling. The fact that SiC substrates are semi-transparent at infrared wavelengths means the conventional wafer detection system used on Si process tools are not always able to detect them. Thus, we had to develop SiC-specific upgrade packages for our transport and process modules to ensure reliable wafer handling. Similarly, where SiC wafers need to be clamped electrostatically during process, Lam has developed optimized clamping algorithms to facilitate this. Finally, SiC can behave very differently from Si, especially from an etch perspective. It is a strongly bonded material that exhibits a number of ion- and crystallography-induced etch defectivity mechanisms that don’t exist in silicon. To overcome this, application-specific process development is needed to address key steps, such as the critical trench etch process in SiC MOSFET manufacturing.”

Fig.3: The 200mm Vector platform offers PECVD capability for advanced power semiconductor fabrication. Source: Lam Research

Fig.3: The 200mm Vector platform offers PECVD capability for advanced power semiconductor fabrication. Source: Lam Research

For its part, Applied Materials chose to give a MasterClass, during which it launched two new tools dedicated to SiC. “Silicon carbide chips switch more efficiently than silicon-based high-power chips and dissipate less power,” said Mike Chudzik, vice president of technology for Applied’s Semiconductor Products Group. “From an engineering perspective, the power dissipation of a silicon carbide chip is governed by the square of the drain current (Id), and the ‘on’ resistance (Ron). To improve the efficiency, we reduce the ‘on’ resistance by increasing the electron mobility.”

The goal is a perfect crystal. “Electron mobility can be improved with gate orientation and cell pitch reduction, and is inversely proportional to doping concentration,” Chudzik said. “Defects in the silicon carbide crystal created during the manufacturing process degrade mobility, which increases electrical resistance, reduces performance, and wastes power. Two of the key process technologies are silicon carbide wafer CMP, which reduces surface defects, and ion implantation, which optimizes electron mobility by reducing bulk defects in the silicon carbide.”

He explained that power chip formation begins with a bare silicon carbide wafer that needs to be polished smooth because it’s the base upon which a subsequent epi layer is grown. “Silicon carbide is a very hard material — much harder than materials like silicon, silicon dioxide and copper that are commonly planarized with CMP technologies,” he said. “At the same time, a silicon carbide chip needs to have a uniform crystalline lattice throughout the device.”

To produce uniform wafers with the highest quality surfaces, Applied developed the Mirra Durum CMP system, which integrates polishing, measurement of material removal, cleaning, and drying in a single system (see figure 4). The company claims a 50X reduction in finished wafer surface roughness as compared to mechanically grinded SiC wafers, and a 3X reduction in roughness compared to batch CMP processing systems.

Fig. 4: The 200mm Mirra Durum CMP system is designed to produce uniform SiC wafers with the highest quality surfaces by integrating polishing, materials removal measurement, cleaning, and drying in a single system. Source: Applied Materials

The second introduction concerns doping at high temperature. During fabrication, dopants are implanted into material to help enable and direct the flow of current within the high-power producing circuits. Because of SiC’s density and hardness, it’s a huge challenge to inject, accurately place, and activate the dopants without damaging the crystal lattice, which would reduce performance and power efficiency. Applied addressed this challenge using a hot ion implant system for 150mm and 200mm SiC wafers, which it says results in a 40X reduction in resistivity compared to implanting at room temperature.

Following doping, the next critical stage for ensuring the integrity of the crystalline structure and activating the dopants is annealing, which in SiC is a far hotter process than in silicon. To handle that, centrotherm’s c.Activator annealing furnace provides electrical activation of dopants at temperatures up to 2,000°C. It is one of several products the company has tailored to SiC manufacturing (see figure 5).

Fig. 5: centrotherm offers a range of equipment for SiC manufacturing that provides 150/200 mm bridge capabilities. Source: centrotherm

And a couple of years ago, Canon overhauled a stepper that it first released in 1995 to make it compatible with SiC manufacturing. Canon said the updates make it compatible with wafer transfer functions that support warped or transparent wafer processes, such as SiC, and alignment system options that align the X and Y alignment mark measurement to increase stepper productivity.

Are we there yet?
Despite a slew of announcements, there is still a long way to go. “It’s still early days,” said Sally Ann Henry, director of business development at ACM Research, a relatively young but fast-growing equipment supplier best known for its advanced front-end cleaning technology for silicon. She said that although it might seem in the media like everyone’s up and running SiC on 200mm, most IDMs actually are still in the building phase and running on 150mm wafers in the meantime.

Asked how ACM Research got into supporting SiC, Henry said it started around 2020. “ACM got into the silicon carbide business because customers were asking for it, particularly in the Asian market,” she said. “In Europe and the US, we could see there was a huge growth area, so we went after it.”

ACM has seen inquiries from smaller players on its website. From major players, she has seen a lot of interest in “bridge tools,” which can be qualified at 150mm and then moved to 200mm when their buildings are finished, which she sees as being mostly complete in 2024.

To be ready, ACM Research has equipped all of its SiC-enabled tools with state-of-the-art sensors, so the wafers can be identified and carefully handled. The handling systems have been adapted to cope with the bow and transparency of SiC wafers.

Although the SiC power device market has been increasing steadily over the last five years, forecasts indicate a major uptick starting in 2024. Leading equipment suppliers have risen to the basic challenges of SiC manufacturing, but because lead times are very long, fab managers are placing orders for additional equipment now. That said, there is still plenty of room for improvement in process details, something the IDMs and foundries continue to work on with their suppliers.

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