Home
TECHNICAL PAPERS

MAC Operation on 28nm High-k Metal Gate FeFET-based Memory Array with ADC (Fraunhofer IPMS/GF)

popularity

A technical paper titled “Demonstration of Multiply-Accumulate Operation With 28 nm FeFET Crossbar Array” was published by researchers at Fraunhofer IPMS and GlobalFoundries.

Abstract
“This letter reports a linear multiply-accumulate (MAC) operation conducted on a crossbar memory array based on 28nm high-k metal gate (HKMG) Complementary Metal Oxide Semiconductor (CMOS) and ferroelectric field effect transistor (FeFET). The fabrication is conducted at GlobalFoundries with their standard 28nm technology. The crossbar arrays show a 100% yield in MAC operation on a 300mm wafer. The arrays were divided into 8×8 segments. The FeFET crossbar arrays were fabricated with access transistors, current-limiter transistors and a current-mode analog-to-digital converter (ADC) on the same wafer. Finally, the data retention characteristics reveal excellent data retention characteristics up to 5×104 seconds, which makes this memory array suitable for carrying out MAC operations in inference engine applications.”

Find the open access technical paper here. Published October 2022.

Citation: S. De et al., “Demonstration of Multiply-Accumulate Operation With 28 nm FeFET Crossbar Array,” in IEEE Electron Device Letters, vol. 43, no. 12, pp. 2081-2084, Dec. 2022, doi: 10.1109/LED.2022.3216558.

Related Reading
Multi-Bit In-Memory Computing System For HDC Using FeFETs, Achieving SW-Equivalent-Accuracies
Reservoir Computing HW Based On A CMOS-Compatible FeFET
Nonvolatile Capacitive Crossbar Array For In-Memory Computing



Leave a Reply


(Note: This name will be displayed publicly)