tag: AI

Hardware-Software Co-Design Reappears
By Brian Bailey - 25 Jul, 2019 - Comments: 1

The core concepts in hardware-software co-design are getting another look, nearly two decades after this approach was first introduced and failed to catch on. What's different this time around is the growing complexity and an emphasis on architectural improvements, as well as device scaling, particularly for AI/ML applications. Software is a critical component, and the more tightly integrate... » read more

Using Memory Differently To Boost Speed
By Ed Sperling - 22 Jul, 2019 - Comments: 2

Boosting memory performance to handle a rising flood of data is driving chipmakers to explore new memory types and different ways of using existing memory, but it also is creating some complex new challenges. For most of the semiconductor design industry, memory has been a non-issue for the past couple of decades. The main concerns were price and size, but memory makers have been more than a... » read more

In Memory And Near-Memory Compute
By Ed Sperling - 19 Jul, 2019 - Comments: 0

Steven Woo, Rambus fellow and distinguished inventor, talks about the amount of power required to store data and to move it out of memory to where processing is done. This can include changes to memory, but it also can include rethinking compute architectures from the ground up to achieve up to 1 million times better performance in highly specialized systems. Related Find more memor... » read more

Week in Review: IoT, Security, Auto
By Jeff Dorsch - 19 Jul, 2019 - Comments: 0

Products/Services Arm rolled out its Flexible Access program, which offers system-on-a-chip design teams the capability to try out the company’s semiconductor intellectual property, along with IP from Arm partners, before they commit to licensing IP and to pay only for what they use in production. The new engagement model is expected to prove useful for Internet of Things design projects and... » read more

GDDR Accelerates Artificial Intelligence And Machine Learning
By Frank Ferro - 16 Jul, 2019 - Comments: 0

The origins of modern graphics double data rate (GDDR) memory can be traced back to GDDR3 SDRAM. Designed by ATI Technologies, GDDR3 made its first appearance in NVidia’s GeForce FX 5700 Ultra card which debuted in 2004. Offering reduced latency and high bandwidth for GPUs, GDDR3 was followed by GDDR4, GDDR5, GDDR5X and the latest generation of GDDR memory, GDDR6. GDDR6 SGRAM supports a ma... » read more

Low-Power Design Becomes Even More Complex
By Ann Mutschler - 16 Jul, 2019 - Comments: 0

Throughout the SoC design flow, there has been a tremendous amount of research done to ease the pain of managing a long list of power-related issues. And while headway has been made, the addition of new application areas such as AI/ML/DL, automotive and IoT has raised as many new problems as have been solved. The challenges are particularly acute at leading-edge nodes where devices are power... » read more

What’s Powering Artificial Intelligence
By Arm - 15 Jul, 2019 - Comments: 0

To scale artificial intelligence (AI) and machine learning (ML), hardware and software developers must enable AI/ML performance across a vast array of devices. This requires balancing the need for functionality alongside security, affordability, complexity and general compute needs. Fortunately, there’s a solution hiding in plain sight. To read more, click here (scroll down to "Download No... » read more

System Bits: July 15
By Jeff Dorsch - 15 Jul, 2019 - Comments: 0

Automating bridge inspections with robotics The University of Waterloo has come up with robotics that could be used in automated inspection of bridges, making sure such critical infrastructure is safe and sound. The technology promises to make bridge inspection cheaper and easier. The system collects data for defect detection and analysis through a combination of autonomous robots, cameras,... » read more

How To Improve ML Power/Performance
By Ed Sperling - 12 Jul, 2019 - Comments: 0

Raymond Nijssen, vice president and chief technologist at Achronix, talks about the shift from brute-force performance to more power efficiency in machine learning processing, the new focus on enough memory bandwidth to keep MAC functions busy, and how dynamic range, precision and locality can be modified to improve speed and reduce power. » read more

Week in Review: IoT, Security, Auto
By Jeff Dorsch - 12 Jul, 2019 - Comments: 0

Products/Services Arteris IP reports that Bitmain licensed the Arteris Ncore Cache Coherent Interconnect intellectual property for use in its next-generation Sophon Tensor Processing Unit system-on-a-chip devices for the scalable hardware acceleration of artificial intelligence and machine learning algorithms. “Our choice of interconnect IP became more important as we continued to increase t... » read more

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