tag: ARM

The Week In Review: Design/IoT
By Ed Sperling - 11 Sep, 2015 - Comments: 0

Tools Mentor Graphics rolled out a new version of its tool for transferring PCB designs into data for fabrication, assembly and test. The company also announced that its debug environment will support the UPF Low Power Successive Refinement Methodology. Deals Ansys and Cray are claiming the world's record for simulation by scaling 129,000 cores. That's about 4X the previous record.  Ansys... » read more

New Metrics For The Cloud
By Ed Sperling - 10 Sep, 2015 - Comments: 0

Data centers are beginning to adjust their definition of what makes one server better than another. Rather than comparing benchmarked performance of general-purpose servers, they are adding a new level of granularity based upon what kind of chips work best for certain operations or applications. Those decisions increasingly include everything from the level of redundancy in compute operations, ... » read more

Integration Or Segregation
By Brian Bailey - 10 Sep, 2015 - Comments: 0

In the Electronics Butterfly Effect story, the observation was made that the electronics industry has gone non-linear, no longer supported by incremental density and cost-reducing improvements that Moore’s Law promised with each new node. Those incremental changes, over several decades, have meant that design and architecture have followed a predictable path with very few new ideas coming in ... » read more

FPGA’s Role Expands
By Ann Mutschler - 10 Sep, 2015 - Comments: 1

For more than a decade FPGA vendors argued that FPGAs would become a viable alternative to ASICs, adding programmability along with the same kind of advances in performance and power that ASICs saw at each new process node. While that never played out as they expected, FPGAs nonetheless have carved out a formidable position in the semiconductor market. Generally speaking, FPGAs today are us... » read more

Power Estimation: Early Warning System Or False Alarm?
By Brian Bailey - 10 Sep, 2015 - Comments: 0

Semiconductor Engineering sat down with a large panel of experts to discuss the state of power estimation and to find out if the current levels of accuracy are sufficient to being able to make informed decisions. Panelists included: Leah Schuth, director of technical marketing in the physical design group at [getentity id="22186" comment="ARM"]; Vic Kulkarni, senior vice president and general m... » read more

Thermal And Power Considerations In Designing For The Developing World
By Brian Fuller - 10 Sep, 2015 - Comments: 0

Engineers designing for emerging markets confront fascinating challenges. Take data centers for developing societies. Most of these systems are in remote locations, exposed to the elements, with limited power, save for the sun. How do you deal with rain, rust, durability? How do you prevent members of the animal kingdom sauntering by and chewing on your system? These are some of the intri... » read more

Blog Review: Sept. 9
By Ed Sperling - 09 Sep, 2015 - Comments: 0

Doulos' John Aynsley explains in a guest blog for Aldec why FPGA designers need to know SystemVerilog and UVM. Might be time to increase the coffee budget. Speaking of verification, Cadence's Frank Schirrmeister notes that his company is joining forces with Mentor Graphics and Breker for a contribution to the Accellera Portable Stimulus Working Group. This is potentially a big deal in veri... » read more

NanoService Solution: Optimized Web Service Technology For An Embedded World
By Arm - 09 Sep, 2015 - Comments: 0

This paper discusses the architecture, features, and benefits of ARM Sensinode NanoService solution. Recognizing that Web applications based on the REST architecture have become ubiquitous, IOT deployments in a wide variety of market segments can benefit from using Web technology and the REST architecture. This paper demonstrates how ARM Sensinode NanoService solution can be used to provide a s... » read more

Rising Threats From Differential Power Analysis
By Ernest Worthman - 03 Sep, 2015 - Comments: 0

Differential power analysis (DPA) has been a threat vector on the chip landscape for a number of years. It was discovered around the mid 1990s by the teams at [getentity id="22671" e_name="Rambus"]’ Cryptography Research Division, and turned out to be a very effective tool for compromising the ubiquitous SIM card environment. “The most traditional market for DPA has been with smart cards... » read more

Executive Insight: Sanjiv Kaul
By Ed Sperling - 02 Sep, 2015 - Comments: 0

Sanjiv Kaul, president and CEO of [getentity id="22016" e_name="Calypto"], sat down with Semiconductor Engineering to talk about dynamic power concerns in finFETs, where software fits in, and why high-level synthesis is now a competitive requirement at advanced nodes. What follows are excerpts of that conversation. SE: What's the biggest problem the semiconductor industry is facing right no... » read more

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