tag: memory

Material And Process Challenges In A Changing Memory Landscape
By Er-Xuan Ping - 21 Jul, 2016 - Comments: 0

Moore’s Law has fueled the semiconductor industry’s growth for decades. But as the complexity of scaling increases, extending the economics of Moore’s Law is becoming a challenge. One example illustrating the challenges of maintaining the economic benefits of Moore’s Law is the difficulty of IC chip patterning. Today, this requires an expensive litho scanner, a complicated spacer and... » read more

Power/Performance Bits: July 19
By Jesse Allen - 19 Jul, 2016 - Comments: 0

Atomic storage In the search for ever-smaller storage, a team of scientists at Delft University in the Netherlands built a 1 kilobyte memory where each bit is represented by the position of one single chlorine atom. "In theory, this storage density would allow all books ever created by humans to be written on a single post stamp," said lead scientist Sander Otte. They reached a storage de... » read more

The Future Of Memory (Part 2)
By Ed Sperling - 13 Jul, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss future memory with Frank Ferro, senior director of product management for memory and interface IP at [getentity id="22671" e_name="Rambus"]; Marc Greenberg, director of product marketing at [getentity id="22035" e_name="Synopsys"]; and Lisa Minwell, [getentity id="22242" e_name="eSilicon"]'s senior director of IP marketing. What follows are excerpt... » read more

OTP Memory For Mobile Payment Applications
By CJ Tsai - 07 Jul, 2016 - Comments: 0

The trend toward mobile banking and payments as a way to replace debit or credit cards, or integrate a part of their functions into a mobile device, is moving faster than most industry analysts predicted. In China, for example, mobile payment systems Alipay and WeChat pay are popular and well used, and a great way for easy account monitoring and ditching the wallet. It is a fundamental change t... » read more

The Future Of Memory
By Ed Sperling - 16 Jun, 2016 - Comments: 2

Semiconductor Engineering sat down to discuss future memory with Frank Ferro, senior director of product management for memory and interface IP at [getentity id="22671" e_name="Rambus"]; Marc Greenberg, director of product marketing at [getentity id="22035" e_name="Synopsys"]; and Lisa Minwell, [getentity id="22242" e_name="eSilicon"]'s senior director of [getkc id="43" kc_name="IP"] marketing.... » read more

“eNVM Inside” Could Be The Next Catchphrase
By Charlie Cheng - 02 Jun, 2016 - Comments: 0

Let's do a bit of a refresh on embedded non-volatile memory (eNVM) IP and the markets it has ably served: analog/mixed signal, automotive, consumer, industrial and mobile applications. Rather mainstream segments, albeit high value, in need of reliable storage. An estimated 10-billion units shipped in more than 400 chip designs makes eNVM IP a popular choice. See for yourself as we take a ret... » read more

The Mightier Microcontroller
By Ed Sperling - 26 May, 2016 - Comments: 1

Microcontrollers are becoming more complex, more powerful, and significantly more useful, but those improvements come with strings attached. While it's relatively straightforward to develop multi-core microcontroller (MCU) hardware with advanced power management features, it's much more difficult to write software for these chips because memory is limited. CPUs can use on-chip memory such as... » read more

RC Delay: Bottleneck To Scaling
By Rajkumar Jakkaraju - 24 May, 2016 - Comments: 1

R = resistance — the difficulty an electrical current has in passing through a conducting material. C = capacitance — the degree to which an insulating material holds a charge. RC delay = the delay in signal speed through the circuit wiring as a result of these two effects. RC delay is important because it can become a significant obstacle to continued downward scaling of logic and... » read more

Power/Performance Bits: May 24
By Jesse Allen - 24 May, 2016 - Comments: 0

Reducing MRAM chip area Researchers from Tohoku University developed a technology to stack magnetic tunnel junctions (MTJ) directly on the via without causing deterioration to its electric/magnetic characteristics. The team focused on reducing the memory cell area of spin-transfer torque magnetic random access memory (STT-MRAM) in order to lower manufacturing costs, making them more compe... » read more

One-On-One: Dave Hemker
By Ed Sperling - 19 May, 2016 - Comments: 0

Dave Hemker, CTO at [getentity id="22820" comment="Lam Research"], sat down with Semiconductor Engineering to look at some of the key issues on the process and manufacturing side, and some of the key developments that will reshape the semiconductor industry in the future. What follows are excerpts of that conversation. SE: One of the big discussion topics these days is [getkc id="208" commen... » read more

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