The Hunt For A Low-Power PHY


Physics has been on the side of chipmakers throughout most of the lifetime of [getkc id="74" comment="Moore's Law"], but when dealing with the world outside the chip, physics is working against them. Pushing data at ever-faster rates through boards and systems consumes increasing amounts of power, but the power budget for chips has not been increasing. Could chips be constrained by their int... » read more

Time For New Rules


Is Moore's Law dead? Brigadier General Paul Fredenburgh, commandant of the Dwight D. Eisenhower School for National Security and Resource Strategy, asked that question to four industry CEOs last week while visiting Silicon Valley with some of his students. He received four highly nuanced, if not different, answers. Left to right: Lip-Bu Tan, Cadence; Wally Rhines, Mentor Graphics; Simon Se... » read more

IoT Security Risks Grow


Semiconductor Engineering sat down to discuss security issues with Asaf Shen, vice president of marketing for security IP in [getentity id="22186" e_name="ARM's"] Systems & Software Group; Timothy Dry, principal staff marketing manager for the Industrial IoT segment at [getentity id="22819" comment="GlobalFoundries"]; Chowdary Yanamadala, senior vice president of business development at Cha... » read more

When Will It Be Done?


Design teams have done remarkably well in getting chips out the door on time, despite growing complexity at each new node and an increase in the number of features and IP blocks that need to be integrated into designs. There has been plenty of grumbling, along with dire warnings about the future of Moore's Law and the impact of industry consolidation. The reality, though, is that the volume ... » read more

Big Changes In Patterning


Aki Fujimura, CEO of [getentity id="22864" comment="D2S"], sat down with Semiconductor Engineering to discuss patterning issues at 10nm and below, including mask alignment, the need for GPU acceleration, EUV's future impact on the total number of masks, and what the re-introduction of curvilinear shapes will mean for design. SE: Patterning issues are getting a lot of attention at 10nm and 7n... » read more

Battling Fab Cycle Times


The shift from planar devices to finFETs enables chipmakers to scale their processes and devices from 16nm/14nm and beyond, but the industry faces several challenges at each node. Cost and technical issues are the obvious challenges. In addition, cycle time—a key but less publicized part of the chip-scaling equation—also is increasing at every turn, creating more angst for chipmakers and... » read more

What Are FeFETs?


The memory market is going in several different directions at once. On one front, the traditional memory types, such DRAM and flash, remain the workhorse technologies in systems despite undergoing some changes in the business. Then, several vendors are readying the next-generation memory types in the market. As part of an ongoing series, Semiconductor Engineering will explore where the new a... » read more

Routing Signals At 7nm


[getperson id="11763" comment="Tobias Bjerregaard"], [getentity id="22908" e_name="Teklatech's"] CEO, discusses the challenges of designs at 7nm and beyond, including power integrity, how to reduce IR drop and timing issues, and how to improve the economics of scaling. SE: How much further can device scaling go? Bjerregaard: The way you should look at this is [getkc id="74" comment="Moore... » read more

More Degrees Of Freedom


Ever since the publication of Gordon Moore's famous observation in 1965, the semiconductor industry has been laser-focused on shrinking devices to their practical, and more recently, impractical limit. Increasing transistor density has encountered a number of problems along the way, but it also has enabled us to put computers—which once filled specially built rooms—onto the desktop firs... » read more

Not All Software Is Like Elvis


January is traditionally my look-back and outlook month. Five years ago my year-end wish had been a census of software developers, and it is fascinating how software in the context of verification has evolved since then (more on this below). Also, most years I go into my garage, dust off my collection of IEEE Spectrum print editions from January five, ten and 15 years back to assess which of th... » read more

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