tag: Synopsys

Security Improvements Ahead
By Ed Sperling - 10 Nov, 2015 - Comments: 0

After nearly two years of talking about how security is one of the biggest problems facing the IoE, progress is being made on a number of fronts. The changes involve many companies, both individually and collaboratively through standards groups. And while none of this will stop the kind of high-profile breaches that affected Target or Home Depot or JPMorgan Chase or a long list of other gian... » read more

Stop Getting Burned By Power Consumption Surprises
By Alan Gibbons - 09 Nov, 2015 - Comments: 0

Very rarely these days do we get silicon back and find that we have missed our timing or test constraints by a significant margin. We have robust EDA tools, libraries and design methodologies in place to ensure that we can cleanly signoff against these constraints. However, we do continue to see too many unfortunate “surprises” in silicon related power (energy) consumption and thermal issue... » read more

The Week In Review: Design/IoT
By Jesse Allen - 06 Nov, 2015 - Comments: 0

Mentor Graphics began selling infrastructure hardware this week, including an end-to-end IoT solution that includes a reference design for a customizable gateway, a cloud backend, and runtime solutions on which to build a wide array of IoT edge devices. Mentor also released virtual platforms for Altera's Arria 10 SoC FPGA, and updated its Valor PCB manufacturing process to focus on Industry 4.0... » read more

The Great IoE Race Begins
By Ed Sperling - 05 Nov, 2015 - Comments: 0

Nobody knows how many tens of billions of semiconductors will be used in the IoE, but it's a sure bet it won't be a few chips replicated billions of times. Most IoE devices will need to be customized for specific applications. Many will need to be highly reliable for many years. And all of them will need to be secure and power-efficient. Yet they also will need to connect to heterogeneous ne... » read more

The New Face of Formal
By Brian Bailey - 04 Nov, 2015 - Comments: 0

Semiconductor engineering sat down to discuss the recent growth in adoption of formal technologies and tools with Lawrence Loh, product engineering group director at [getentity id="22032" e_name="Cadence"], Praveen Tiwari, senior manager R&D, verification group at [getentity id="22035" e_name="Synopsys"], Harry Foster, chief scientist at [getentity id="22017" e_name="Mentor Graphics"], Normando... » read more

Making IP Secure
By Ann Mutschler - 02 Nov, 2015 - Comments: 0

[getkc id="43" comment="IP"] security is coming under increasing scrutiny as concerns about system and hardware security escalate. For IP, this is particularly critical because commercially available IP touches many players in the semiconductor and software ecosystem. IP users want to ensure they are using the IP as the provider intended and that they are protected against malicious code. IP... » read more

The Week In Review: Design/IoT
By Jesse Allen - 30 Oct, 2015 - Comments: 0

Tools Aldec introduced Hybrid Emulation including support for ARM Fast Models. Aldec says the capability to link an SoC emulation hardware platform with a virtual platform allows both software and hardware teams to work on the most up-to-date version of the project, long before first silicon is available, or even much of the RTL or IP has been completed. eSilicon's online quoting tools fo... » read more

HW Vs. SW: Who’s Leading Whom?
By Brian Bailey - 29 Oct, 2015 - Comments: 6

In the past, technologies were developed in the software world that have languished until they were taken up by the hardware community. Then they were refined and polished and became fully integrated into the hardware development and verification flow. Examples are lint and formal. That was followed by attempts to migrate methodologies, such as object-oriented programming, which is the basis fo... » read more

Hybrid Emulation Gets More Hybrid
By Ed Sperling - 29 Oct, 2015 - Comments: 0

Rising chip complexity is creating a booming emulation business, as chipmakers working at advanced nodes turn to bigger iron to get chips out the door on time. What started as a "shift lift"—doing more things earlier in the design cycle—is evolving into a more complex mix of hardware-accelerated verification for both hardware and software. There are even some new forays into power explor... » read more

Culture Clash In Analog
By Ann Mutschler - 29 Oct, 2015 - Comments: 2

The analog/mixed signal world is being shaken up by a mix of new tools, an influx of younger engineers with new and broader approaches, and an emphasis on changing methodologies to improve time to market. Analog and digital engineers have never quite seen eye-to-eye. Analog teams leverage techniques that have been around, in some cases, for decades, while digital teams rely heavily on the la... » read more

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