Closing The Power Integrity Gap


Voltage drop has always been a significant challenge. As far back as 130nm, specialist tools were being used to ensure that enough local decoupling capacitance (decap) cells were inserted in addition to larger decaps implemented around the SoC. But advanced nodes are complicating matters and further increasing complexity. These technological challenges, which underlie the power, performance ... » read more

Blog Review: Oct. 19


Mentor's Colin Walls provides some tips on writing portable, reusable code. Cadence's Christine Young contends that you should never use 2.5D for characterization at advanced nodes. Synopsys' Eric Huang considers one impractical use of USB heating and the IoT. Applied's Ben Lee predicts a rapid growth in China's power device manufacturing. NXP's Joppe Bos digs into the challenges of... » read more

Power Limits Of EDA


Power has become a major gating factor in semiconductor design. It is now the third factor in design optimization, along with performance, and is almost becoming more important than area. But there are limits to the amount of help that [getkc id="7" kc_name="EDA"] can provide with [getkc id="106" kc_name="power optimization"]. Power is not just an optimization problem. It is a design problem... » read more

Simplifying Software Separation With Real-Time Virtualization


Electronic systems are becoming more complex across multiple markets including automotive, industrial control and healthcare. Vehicles are beginning to drive themselves, industrial robots are becoming increasingly collaborative, and medical systems are automated to assist with surgery or deliver medication. This trend is not a new phenomenon. What was a high-end capability in the last generatio... » read more

Seeing The Future Of Vision


Vision systems have evolved from cameras that enable robots to “see” on a factory floor to a safety-critical element of the heterogeneous systems guiding autonomous vehicles, as well as other applications that call for parallel processing technology to quickly recognize objects, people, and the surrounding environment. Automotive electronics and mobile devices currently dominate embedded... » read more

Getting The Power/Performance Ratio Right


Getting to market quickly means determining as soon as possible if a concept for a new design will work or not, particularly where power and performance are concerned. Making this determination requires intimate knowledge of the scenarios in which the device will operate — and that is just the start. In order to set things up, you need to somehow model the system, which could be done in a ... » read more

Blog Review: Oct. 12


Mentor's Harry Foster digs into verification technology adoption trends for ASIC/IC. Cadence's Tom Anderson looks at the goals of the Portable Stimulus Working Group and how they compare to those of UVM. Synopsys' Eric Huang checks out what's new in the land of USB, Type-C adoption, and cable testing. Ansys' Aveek Sarkar explores the challenges facing 7nm designs and the benefits of ch... » read more

Early Power Modeling Using SystemC And TSMC System-PPA


Power consumption is often more important than performance in today’s SoC designs because of battery size and power dissipation limitations. The dilemma is that the most leverage available to optimize power consumption is at the architectural design stage, but there often is not enough information available early enough to make accurate power decisions. On the performance side, SystemC mod... » read more

Choosing Verification Engines


Emulation, simulation, FPGA prototyping and formal verification have very specific uses on paper, but the lines are becoming less clear as complexity goes up, more third-party IP is included, and the number of use cases and interactions of connected devices explodes. Ironically, the lines are blurring not for the most complex SoCs, such as those used in smart phones. The bigger challenge app... » read more

Blog Review: Oct. 5


Mentor's Michael White explores why established nodes are experiencing such an unexpectedly long lifespan and how that is driving new challenges for designers. Cadence's Ann Keffer checks out the history of Ethernet and how it won the battle to become the dominant network protocol. Is your IoT device fueling a botnet? Vulnerable firmware on internet connected devices was behind one of the... » read more

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